IMP16C554 IMP Inc, IMP16C554 Datasheet - Page 3

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IMP16C554

Manufacturer Part Number
IMP16C554
Description
Quad Universal Asynchronous Receiver/Transmitter (UART) with FIFOs
Manufacturer
IMP Inc
Datasheet

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3
SYMBOL DESCRIPTION
symbol
TXRDY*
A2
A1
A0
RXRDY*
INTSEL
INT A-B
INT C-D
RTS*A-B
RTS*C-D
DTR*A-B
DTR*C-D
39
15.21
49.55
14.22
48.56
12.24
46.58
32
33
34
38
65
pin
Signal
Type
O
O
O
O
O
I
I
I
I
408-432-9100/www.impweb.com
Transmit ready. (active low) This pin goes high when the
transmit FIFO of the IMP16C554 is full. It can be used as a
single or multi-transfer.
Address select line 2.To select internal registers.
Address select line 1.To select internal registers.
Address select line 0.To select internal registers.
Receive ready.(active low ) This pin goes low when the
receive FIFO is full. It can be used as a single or
multi-transfer.
Interrupt type select. Enable /disable the interrupt three state
function. Normal interrupt output can be selected by
connecting this pin to VCC(MCR bit-3 does not have any
effect on the interrupt output ).The three state interrupt output
is selected when this pin is left open or connected to GND
and MCR bit-3 is to “1”.
Interrupt output.( active high) this pin goes high (when enable
by the interrupt enable register)whenever a receiver error.
receiver data available. transmitter empty, or modem status
condition flag is detected.
Request to send.(active low) To indicate that the transmitter
has data ready to send .Writing a “1” in the modem control
register(MCR bit-1) will set this pin to a low state. After the
reset this pin will be set to high. Note that this pin does not
have any effect on the
Data terminal ready. (active low) To indicate that IMP16C554 is
ready to receive data. This pin can be controlled via the
modem control register (MCR bit-0).writing a “1” at the MCR
bit-0 will set the DTR* output to low.
Pin Description
transmit or receive operation.
IMP16C554
IMP16C554
© 2002 IMP, Inc.

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