IMP16C554 IMP Inc, IMP16C554 Datasheet - Page 2

• Manufacturer Part Number: IMP16C554
• Description: Quad Universal Asynchronous Receiver/Transmitter (UART) with FIFOs
• Manufacturer: IMP Inc

2
SYMBOL DESCRIPTION
symbol
D0-D7
RX A-B
RX C-D
TX A-B
TX C-D
CS*A-B
CS*C-D
XTAL1
XTAL2
LOW*
GND
GND
IOR*
5-66
41.63
17.19
51.53
16.20
50.54
6.23
40.57
pin
7.29
35
36
18
52
Signal Type
I/O
O
O
O
I
I
I
I
I
Bi-directional data bus. Eight bit,
transfer information to or from the CPU. Do is the least
significant bit of the data bus and the first serial data bit to be
received or transmitted.
Serial data input. The serial information (data) received from
serial port to IMP16C554 receive input circuit . A mark (high)
is logic one and a space (low)is logic zero. During the local
loopback mode the RX input is disabled from external
connection and to the TX output internally.
Serial data output. The serial data is transmitted via this pin
with additional start, stop and parity bits. The TX will be held
in mark(high) state during reset, local loopback mode or
when the transmitter is disabled.
Chip select. (active low) A low at this pin enables the
IMP16C554/CPU data transfer operation. Each UART sections
of the IMP16C554 can be accessed independently.
Crystal input 1 or external clock input. A crystal can be
connected to this pin and XTAL2 pin to utilize the internal
oscillator circuit. An external clock can be used to clock
internal circuit and baud rate generator for custom
transmission rates.
Crystal input 2 or buffered clock output. See XTAL1.
Write strobe.(active low)A low on this pin will transfer the
contents of the CPU data bus to the addressed register.
Signal and power ground.
Read strobe.(active low)A low level on this pin transfers the
contents of the IMP16C554 data bus to the CPU.
408-432-9100/www.impweb.com
Pin Description
IMP16C554
IMP16C554
three state data bus to
© 2002 IMP, Inc.