IMP16C554 IMP Inc, IMP16C554 Datasheet - Page 11

• Manufacturer Part Number: IMP16C554
• Description: Quad Universal Asynchronous Receiver/Transmitter (UART) with FIFOs
• Manufacturer: IMP Inc

11
IMP16C554 EXTERNAL RESET CONDITION
AC ELECTRICAL CHARACTERISTICS
TA=0 –70
Note 1: = Baudout cycle
Symbol
T1
T2
T3
T8
T9
T12
T13
T14
T15
T16
T17
Tw
T19
T21
T23
T24
T25
Tr
T26
T28
T29
T30
T31
T32
T33
T34
T35
T44
T45
T46
T47
N
REGISTER RESET STATE
115.2K
19.2K
38.4K
56K
MCR
LCR
LSR
IER
ISR
0
C,Vcc= 5.0V±10% unless otherwise specified
Clock high pulse duration
Clock low pulse duration
Clock rise/fall time
Chip select setup time
Chip setup time
Data setup time
Data hold time
IOW* delay from chip select
IOW* strobe width
Chip select hold time from IOW*
Write cycle delay
Write cycle =T15+T17
Data hold time
IOR* delay from chip select
IOR* strobe width
Chip select hold time from LOR*
Read cycle delay
Read cycle =T23+T25
Delay from IOR* to data
Delay from IOW* to output
Delay to set interrupt from MODEM
input
Delay to reset interrupt from IOR*
Delay from stop to set interrupt
Delay from IOR* to reset interrupt
Delay from initial INT reset to transmit
start
Delay from stop to interrupt
Delay from IOW* to reset interrupt
Delay from stop to set RxRdy
Delay from IOR* to reset RxRdy
Delay from IOW* to set TxRdy
Delay from start to reset TxRdy
Baud rate devisor
IER BIT 0-7=0
ISR BIT-0=1, ISR BIT 1-7=0
LCR BITS 0-7=0
MCR BITS 0-7=0
LSR BITS 0-4=0,
LSR BITS 5-6=1 LSR,BIT
Parameter
6
3
2
1
2.77
408-432-9100/www.impweb.com
Min
20
20
5
0
15
15
10
50
0
55
105
15
10
65
0
55
115
8
1
Limits
SIGNALS
TX A-D
RTS* A-D
DTR* A-D
RXRDY*
TXRDY*
INT A-D
MSR
FCR
Typ
Max
10
25
35
50
70
70
1Rck
200
24
100
175
1RCL
K
1
195
8
216-1
IMP16C554
IMP16C554
7=0
MSR BITS 0-3=0,
MSR BITS 4-7=input signals
FCR BIT 0-7=0
RESET STATE
High
High
High
High
Low
Three state mode
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
*
ns
ns
us
ns
*
Conditions
100 pF load
100 pF load
100 pF load
100 pF load
100 pF load
100 pF load
© 2002 IMP, Inc.