IDT82V3380A Integrated Device Technology, IDT82V3380A Datasheet - Page 61

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IDT82V3380A

Manufacturer Part Number
IDT82V3380A
Description
Synchronous Ethernet Idt Wan Plltm Idt82v3380a
Manufacturer
Integrated Device Technology
Datasheet
6
dard except the following:
Table 45: JTAG Timing Characteristics
JTAG
IDT82V3380A
This device is compliant with the IEEE 1149.1 Boundary Scan stan-
The JTAG interface timing diagram is shown in
• The output boundary scan cells do not capture data from the
• The TRST pin is set low by default and JTAG is disabled in order
Symbol
core and the device does not support EXTEST instruction;
to be consistent with other manufacturers.
t
TCK
t
t
t
S
H
D
TCK
TMS
TDI
JTAG
TMS / TDI to TCK setup time
TCK to TMS / TDI Hold Time
TCK to TDO delay time
TCK period
Parameter
TDO
t
S
Figure 28. JTAG Interface Timing Diagram
Figure
28.
t
H
61
t
TCK
Min
100
25
25
t
D
Typ
SYNCHRONOUS ETHERNET WAN PLL™
Max
50
September 30, 2010
Unit
ns
ns
ns
ns

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