IDT82V3380A Integrated Device Technology, IDT82V3380A Datasheet - Page 36

• Manufacturer Part Number: IDT82V3380A
• Description: Synchronous Ethernet Idt Wan Plltm Idt82v3380a
• Manufacturer: Integrated Device Technology

Table 22: Related Bit / Register in Chapter 3.10
Functional Description
Note: * The setting in the 5B, 62 ~ 64, 68 and 69 registers is either for T0 path or for T4 path, as determined by the T4_T0_SEL bit.
IDT82V3380A
T0_DPLL_LOCKED_DAMPING[2:0]
T4_DPLL_LOCKED_DAMPING[2:0]
T0_DPLL_START_DAMPING[2:0]
TEMP_HOLDOVER_MODE[1:0]
T0_DPLL_ACQ_DAMPING[2:0]
CURRENT_DPLL_FREQ[23:0]
T0_HOLDOVER_FREQ[23:0]
T0_DPLL_LOCKED_BW[4:0]
T4_DPLL_LOCKED_BW[1:0]
CURRENT_PH_DATA[15:0]
T0_DPLL_START_BW[4:0]
T0_DPLL_ACQ_BW[4:0]
MAN_HOLDOVER
AUTO_BW_SEL
FAST_LOS_SW
AUTO_AVG
READ_AVG
T4_T0_SEL
FAST_AVG
Bit
T0_HOLDOVER_FREQ[23:16]_CNFG, T0_HOLDOVER_FREQ[15:8]_CNFG,
CURRENT_DPLL_FREQ[23:16]_STS, CURRENT_DPLL_FREQ[15:8]_STS,
CURRENT_DPLL_PHASE[15:8]_STS, CURRENT_DPLL_PHASE[7:0]_STS
T0_DPLL_LOCKED_BW_DAMPING_CNFG
T4_DPLL_LOCKED_BW_DAMPING_CNFG
T0_DPLL_START_BW_DAMPING_CNFG
T0_DPLL_ACQ_BW_DAMPING_CNFG
PHASE_LOSS_FINE_LIMIT_CNFG
T0_HOLDOVER_FREQ[7:0]_CNFG
CURRENT_DPLL_FREQ[7:0]_STS
T0_HOLDOVER_MODE_CNFG
T0_BW_OVERSHOOT_CNFG
36
T4_T0_REG_SEL_CNFG
Register
SYNCHRONOUS ETHERNET WAN PLL™
September 30, 2010
Address (Hex)
64 *, 63 *, 62 *
5F, 5E, 5D
69 *, 68 *
5B *
5C
56
57
58
59
61
07