IDT70V27 Integrated Device Technology, IDT70V27 Datasheet - Page 15

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IDT70V27

Manufacturer Part Number
IDT70V27
Description
32k X 16 3.3v Dual-port Ram
Manufacturer
Integrated Device Technology
Datasheet

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Waveform of BUSY Arbitration Controlled by CE Timing (M/S = V
Waveform of BUSY Arbitration Cycle Controlled by Address Match
Timing (M/S = V
NOTES:
1. All timing is the same for left and right ports. Port “A” may be either the left or right port. Port “B” is the port opposite from port “A”.
2. If t
3. Refer to Chip Enable Truth Table.
AC Electrical Characteristics Over the
Operating Temperature and Supply Voltage Range
NOTES:
1. 'X' in part numbers indicates power rating (S or L).
INTERRUPT TIMING
t
t
t
t
INTERRUPT TIMING
t
t
t
t
AS
WR
INS
INR
AS
WR
INS
INR
IDT 70V27S/L
High-Speed 3.3V 32K x 16 Dual-Port Static RAM
Symbol
Symbol
ADDR
ADDR
BUSY
APS
ADDR
BUSY
and
CE
CE
is not satisfied, the busy signal will be asserted on one side or another but there is no guarantee on which side busy will be asserted.
"A"
"B"
"B"
"A"
Interrupt Set Time
Interrupt Reset Time
"A"
"B"
"B"
"B"
Address Set-up Time
Write Recovery Time
Interrupt Set Time
Interrupt Reset Time
Address Set-up Time
Write Recovery Time
IH
t
APS
)
(2)
(1)
t
APS
Parameter
(2)
t
BAA
Parameter
ADDRESS "N"
MATCHING ADDRESS "N"
t
BAC
ADDRESSES MATCH
15
Min.
____
____
0
0
70V27X15
Com'l Only
Commercial and Industrial Temperature Range
Max.
____
____
15
25
t
t
BDC
BDA
Min.
Min.
____
____
____
____
Com'l & Ind
Com'l & Ind
0
0
(1)
0
0
70V27X20
70V27X35
Max.
Max.
____
____
____
____
20
20
30
35
Min.
Min.
____
____
____
____
Com'l Only
0
0
0
0
70V27X25
Com'l Only
70V27X55
Max.
Max.
____
____
____
____
25
35
40
45
3603 tbl 15a
3603 tbl 15b
IH
3603 drw 14
3603 drw 13
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
)
(1,3)

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