IDT70V27 Integrated Device Technology, IDT70V27 Datasheet - Page 12

• Manufacturer Part Number: IDT70V27
• Description: 32k X 16 3.3v Dual-port Ram
• Manufacturer: Integrated Device Technology

Timing Waveform of Semaphore Read after Write Timing, Either Side
NOTES:
1.
2. "DATA
Timing Waveform of Semaphore Write Contention
NOTES:
1. D
2. All timing is the same for left and right ports. Port “A” may be either left or right port. Port “B” is the opposite from port “A”.
3. This parameter is measured from R/W
4. If t
IDT 70V27S/L
High-Speed 3.3V 32K x 16 Dual-Port Static RAM
CE
OR
SPS
A
= V
SEM
= D
R/W
0
OUT
is not satisfied, there is no guarantee which side will be granted the semaphore flag.
-A
I/O
OE
IH
OL
or UB and LB = V
2
VALID" represents all I/O's (I/O
= V
SIDE
SIDE
IL
, CE
(2)
(2)
R
= CE
“B”
“A”
L
IH
= V
for the duration of the above timing (both write and read cycle), refer to Chip Enable Truth Table.
IH
t
VALID ADDRESS
AS
A
A
, or both UB & LB = V
0"A"
0"B"
"A"
t
SEM
SEM
AW
R/W
R/W
or SEM
-A
-A
Write Cycle
0
-I/O
2"A"
2"B"
"A"
"A"
"B"
"B"
t
t
15
EW
WP
DATA
) equal to the semaphore value.
"A"
going HIGH to R/W
t
IN
DW
IH
t
WR
(refer to Chip Enable Truth Table).
VALID
t
DH
MATCH
"B"
t
SWRD
or SEM
MATCH
12
"B"
VALID ADDRESS
t
SPS
t
going HIGH.
SOP
Read Cycle
t
SAA
Commercial and Industrial Temperature Range
t
t
AOE
ACE
DATA
(1,3,4)
VALID
OUT
t
OH
(2)
3603 drw 10
3603 drw 09
(1)