ST72F264G ST Microelectronics, ST72F264G Datasheet - Page 139

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ST72F264G

Manufacturer Part Number
ST72F264G
Description
(ST72F260G - ST72F264G) 8-BIT MCU
Manufacturer
ST Microelectronics
Datasheet

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DataSheet
EMC CHARACTERISTICS (Cont’d)
13.7.4 ESD Pin Protection Strategy
To protect an integrated circuit against Electro-
Static Discharge the stress must be controlled to
prevent degradation or destruction of the circuit el-
ements. The stress generally affects the circuit el-
ements which are connected to the pads but can
also affect the internal devices when the supply
pads receive the stress. The elements to be pro-
tected must not receive excessive current, voltage
or heating within their structure.
An ESD network combines the different input and
output ESD protections. This network works, by al-
lowing safe discharge paths for the pins subjected
to ESD stress. Two critical ESD stress cases are
presented in
pins and in
drain pins.
Figure 77. Positive Stress on a Standard Pad vs. V
Figure 78. Negative Stress on a Standard Pad vs. V
4
Main path
Path to avoid
Main path
U
.com
Figure 79
Figure 77
V
V
V
V
DD
DD
SS
SS
and
and
Figure 80
Figure 78
(3a)
(3b)
(3a)
(3b)
for true open
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for standard
OUT
OUT
SS
Standard Pin Protection
To protect the output structure the following ele-
ments are added:
To protect the input structure the following ele-
ments are added:
DD
– A diode to V
– A protection device between V
– A resistor in series with the pad (1)
– A diode to V
– A protection device between V
(4)
(4)
ST72260G, ST72262G, ST72264G
IN
IN
DD
DD
(3a) and a diode from V
(2a) and a diode from V
(2a)
(2b)
(2a)
(2b)
(1)
(1)
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DD
DD
and V
and V
139/171
SS
SS
SS
SS
V
V
V
V
DD
SS
DD
SS
(3b)
(2b)
4U
4U.com
4U
(4)
(4)
.com
.com
.com

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