DS3105 Maxim Integrated Products, DS3105 Datasheet - Page 70

• Manufacturer Part Number: DS3105
• Description: Line Card Timing IC
• Manufacturer: Maxim Integrated Products

Register Name:
Register Description:
Register Address:
Name
Default
The DIVN1 and DIVN2 registers must be read consecutively and written consecutively. See section 8.3.
Bits 7 to 0: DIVN Factor (DIVN[7:0]). The full 16-bit DIVN[15:0] field spans this register and DIVN2. This field
contains the integer value used to divide the frequency of input clocks that are configured for DIVN mode. The
frequency is divided by DIVN[15:0] + 1. See section 7.4.2.4.
Register Name:
Register Description:
Register Address:
Name
Default
Bits 7 to 0: DIVN Factor (DIVN[15:8]). See the
Confidential. Document Issued Under Non-Disclosure Agreement. Confidential. Document Issued Under Non-Disclosure Agreement.
Bit 7
Bit 7
1
0
Bit 6
Bit 6
1
0
DIVN1
DIVN Register 1
46h
DIVN2
DIVN Register 2
47h
Preliminary. Subject to Change Without Notice.
Bit 5
Bit 5
1
1
DIVN1
70 of 110
Bit 4
Bit 4
1
1
register description.
DIVN[15:8]
DIVN[7:0]
Bit 3
Bit 3
1
1
Bit 2
Bit 2
1
1
Bit 1
Bit 1
1
1
Bit 0
Bit 0
DS3105
1
1