DS3105 Maxim Integrated Products, DS3105 Datasheet - Page 102

• Manufacturer Part Number: DS3105
• Description: Line Card Timing IC
• Manufacturer: Maxim Integrated Products

10.5 JTAG Interface Timing
Table 10-11. JTAG Interface Timing
(VDD = 1.8V ± 10%; VDDIO = 3.3V ± 5%, T
Note 1:
Note 2:
Figure 10-5. JTAG Timing Diagram
JTCLK Clock Period
JTCLK Clock High/Low Time (Note 1)
JTCLK to JTDI, JTMS Setup Time
JTCLK to JTDI, JTMS Hold Time
JTCLK to JTDO Delay
JTCLK to JTDO High-Z Delay (Note 2)
JTRST Width Low Time
Confidential. Document Issued Under Non-Disclosure Agreement. Confidential. Document Issued Under Non-Disclosure Agreement.
JTDI, JTMS, JTRST
Clock can be stopped high or low.
Not tested during production test.
JTRST
JTCLK
JTDO
PARAMETER
t6
Preliminary. Subject to Change Without Notice.
t7
t2
A
= -40°C to +85°C)
SYMBOL
102 of 110
t4
t2/t3
t1
t4
t5
t6
t7
t8
t1
t5
(Figure
MIN
100
50
50
50
2
2
t3
10-5)
t8
1000
TYP
500
MAX
50
50
UNITS
DS3105
ns
ns
ns
ns
ns
ns
ns