PM5364 pmc-sierra, PM5364 Datasheet - Page 53

• Manufacturer Part Number: PM5364
• Description: Tupp 2488 Assp Telecom Standard
• Manufacturer: pmc-sierra

Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2011334, Issue 7
Pin Name
HRPOH[4]
HRPOH[3]
HRPOH[2]
HRPOH[1]
HRPOHEN[4]
HRPOHEN[3]
HRPOHEN[2]
HRPOHEN[1]
HB3E[4]
HB3E[3]
HB3E[2]
HB3E[1]
HRALM
Type
Output
Output
Output
Output
Pin No.
N1
L2
K2
J2
M2
L1
K1
J1
L3
K3
J3
H2
AJ33
TUPP™ 2488 ASSP Telecom Standard Product Data Sheet
Function
High Order Receive Path Overhead. The high
order receive path overhead signals contain the
received path overhead bytes (J1, B3, C2, G1, F2,
H4, F3, K3, and N1) extracted from the high order
SONET/SDH path overhead.
The HRPOHEN[4:1] signal is set high to indicate
new path overhead bytes on HRPOH[4:1].
HRPOH[4:1] is updated on the falling edge of
HPOHCLK.
High Order Receive Path Overhead Enable. The
high order receive path overhead enable signals
indicates new path overhead bytes on
HRPOH[4:1].
When HRPOHEN[4:1] signal is set high, the
corresponding path overhead byte presented on
HRPOH[4:1] are available for the first time. When
HRPOHEN[4:1] is set low, the corresponding path
overhead byte presented on HRPOH[4:1] have
already been available.
HRPOHEN[4:1] is updated on the falling edge of
HPOHCLK.
High Order Bit Interleaved Parity Error. The high
order bit interleaved parity error signal carries the
path BIP-8 errors detected for each high order
SONET/SDH payload.
Path BIP-8 errors are detected by XORing the
extracted path BIP-8 byte (B3) with the computed
path BIP-8 byte of the previous frame.
HB3E[4:1] is updated on the falling edge of
HPOHCLK.
High Order Receive Alarm bus. The HRALM
signal outputs the high order receive path alarm.
The alarm represents the logical OR of the LOP-P,
AIS-P, RDI-P, ERDI-P, LOPC-P, PAISC-P, UNEQ-
P, PSLU, PLM, PDI-P, TIU-P, TIM-P status of up to
48 high order SONET/SDH paths. The selection of
alarms to be reported is controlled by the TUPP
2488 SARC48 Path RALM Enable registers.
HRALM is set low when none of the enabled
defects is active.
HRALM is time multiplexed among the STS-
1/STM-0 paths.
HRALM is updated on the falling edge of
HRALMCLK.
Released
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