PM5364 pmc-sierra, PM5364 Datasheet - Page 227

• Manufacturer Part Number: PM5364
• Description: Tupp 2488 Assp Telecom Standard
• Manufacturer: pmc-sierra

Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2011334, Issue 7
CML reset sequence:
1. Assert device reset on RSTB and TRSTB pins.
2. Deassert device reset on RSTB and TRSTB pins.
The performance monitoring circuitry in the RHPP_R, SVCA_R, SHPI, RSEF, PIPM blocks
and the CENTER bit of the timing and MUX FIFOs may lock up when the device is reset
during a specific timing window. After the device reset, read the LCML_TIP, SCML_TIP and
HPOH_TIP bits in register 001DH to ensure they are not set to ‘1’. If one or more of these bits
are set to ‘1’, perform a software reset as follows:
3. As the subsystem reset in the MPIF defaults to active, deassert subsystem reset by writing
to appropriate register in the MPIF (SCML_RST and LCML_RST).
4. The SERDES will be held in reset by default. Take this time to write to the CSUI MPIF
registers to configure the CSU. Configuration is not required if an interface is to operate at 622
Mbit/s. If the links are to operate at 777 Mbit/s (system and line side) or 2.488 Gbit/s (line side)
the C_MODE[15:0] bits must be configured as follows:
5. Wait for 1 ms.
6. Deassert LS_CSU_RST/SS_CSU_RST.
7. Wait for 1 ms.
8. Deassert LS_SERDES_RST/SS_SERDES_RST.
9. Wait for 10 ms.
10. Deassert slice resets, if asserted in step 4.
o Wait 5 REFCLK (5x 12.86 ns) cycles.
o Set SRESET to ‘1’ (Master Reset #1: Register 0x0000)
o Wait 200 ns
o Set SRESET to ‘0’ (Master Reset #1: Register 0x0000)
o Wait 100 ns
o Read LCML_TIP, SCML_TIP and HPOH_TIP to ensure they are not set to ‘1’. If one
o Set C_MODE[15:0] to the desired value
o Disable overwrite of the C_MODE[15:0] bits by setting CMODE_OVWR to a logic 0.
o Initialize per-channel SERDES registers for both the receive and transmit sides:
o Set the STS48_EN bit to the desired value
o Setup frequency, phase, line rate, etc.
o Enable DCRU, disable test modes. etc.
o Enable transmitter, configure PISO for line rate and data width, etc.
or more of these bits are set to ‘1’, perform a hardware or software reset again
TUPP™ 2488 ASSP Telecom Standard Product Data Sheet
Released
227