PM5364 pmc-sierra, PM5364 Datasheet - Page 251

• Manufacturer Part Number: PM5364
• Description: Tupp 2488 Assp Telecom Standard
• Manufacturer: pmc-sierra

14.3
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2011334, Issue 7
Transmit Serial Buses
Figure 67 shows the delay from the Incoming parallel TelecomBus stream to the transmit serial
TelecomBus links. For example, this applies to be the outgoing Line Egress serial bus. Due to
the presence of FIFOs in the data path, the delay to the various links can differ by up to 16
REFCLK cycles. The minimum delay (A REFCLK cycles) is shown to be incurred by one of
the transmit protection serial data links (TPPROT[X]/TNPROT[X]) and is the delay through the
TCB encode + TSEC slice (+TILC on system side + MUX FIFO on STS-48 slices). See section
10.10 for details. The maximum delay (A+16 cycles) is shown to be incurred by one of the
transmit working serial data links (TPWRK[X]/TNWRK[X]). TheTJ0 identifies the time at
which all the transmit serial links have transmitted their respective J0 characters (and in the case
of Line Egress is relative to IJ0). The relative phases of the links in Figure 67 are shown for
illustrative purposes only.
Figure 67 Incoming Parallel TelecomBus to Transmit Serial Telecom Bus Timing
TNPROT[Y]/
TPPROT[Y]
TNWRK[X]/
TPWRK[X]
REFCLK
J0J1[1]
PL[1]
TJ0
...
...
Maximum Delay, A+16 cycles
Minimum Delay, A cycles
Delay J0 on J0J1[1] to TJ0, ??A+8+16 cycles
S1,1 / J0
TUPP™ 2488 ASSP Telecom Standard Product Data Sheet
S2,1 / Z0
...
...
S1,1 / J0
S2,1 / Z0
S3,1 / Z0
Released
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