MT92220BG Zarlink Semiconductor, MT92220BG Datasheet - Page 54

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MT92220BG

Manufacturer Part Number
MT92220BG
Description
Description = 1023 Channel Voice Over IP/AAL2 Processor ;; Package Type = Epbga ;; No. Of Pins = 608
Manufacturer
Zarlink Semiconductor
Datasheet
54
+1C
+2C
+3C
+10
+14
+18
+20
+24
+28
+30
+34
+38
+C
+0
+4
+8
TOSv6_0
TOSv4_0
b31
Hop0
v4_0
Dst0
b30
Hash Key Mask
Dword
Option Header
Treatment
v4_X - IPv4 option
field
HopX - IPv6
hop-by-hop header
option
DstX - IPv6
destination header
option
b29
TOSv4_1
TOSv6_1
Hop1
v4_1
Dst1
b28
b27
TOSv6_2
TOSv4_2
Field
Hop2
v4_2
Dst2
b26
b25
b24
b23
b22
This mask will be applied to the identification key before a
CRC is applied to it. When ‘0’, the corresponding bit in the
identification key will be masked to ‘0’. When the
identification key is only 4 dwords long, dwords 4 - 9 in this
mask are ignored.
Indicates what to do when the hardware encounters these
option values.
“00” = unknown/no decision;
“01” = skip to end;
“10” = CPU through fragmented IP;
“11” = delete.
Each profile entry contains the treatment values for Options
N*16 to N*16+15, where N is the profile entry number. In
this way, all 256 values for the options are treated. These
values are not in any way linked to the profile; they just
reside in the same memory.
Table 15 - Fields and Description
3C0h
380h
40h
b21
0h
b20
Figure 28 - Profile Memory
Zarlink Semiconductor Inc.
b19
Hash Key Mask Dword 0
Hash Key Mask Dword 2
Hash Key Mask Dword 3
Hash Key Mask Dword 4
Hash Key Mask Dword 5
Hash Key Mask Dword 6
Hash Key Mask Dword 7
Hash Key Mask Dword 8
Hash Key Mask Dword 9
Hash Key Mask Dword 1
b18
b17
Profile Entry 14
Profile Entry 15
Profile Entry
Profile Entry 0
Profile Entry 1
b16
b15
b14
Description
b13
b12
b11
b10
b9
b8
b7
b6
b5
b4
b3
b2
TOSv4_15
TOSv6_15
Hop15
b1
v4_15
Dst15
b0

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