MT92220BG Zarlink Semiconductor, MT92220BG Datasheet
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MT92220BG
Manufacturer Part Number
MT92220BG
Description
Description = 1023 Channel Voice Over IP/AAL2 Processor ;; Package Type = Epbga ;; No. Of Pins = 608
Manufacturer
Zarlink Semiconductor
Datasheet
1.MT92220BG.pdf
(214 pages)
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Features
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1023 full-duplex PCM or ADPCM voice channels
over IP/UDP/RTP connections or over AAL2 VCs
Simultaneously support of IP/UDP connection
and AAL2 VC
RTP packaging optional in IP/UDP connection
Supports IP version 4 and version 6
Supports IP over Ethernet, ATM (AAL5) or POS
Support Ethernet II, IEEE 802.3, LLC/SNAP and
PPP frames
Supports Classical IP over ATM and LAN
Emulation (LANE) v1/v2
Supports MPLS, MPOA and IEEE 802.1p/Q
ELAN-ID
Packages voice in AAL2 according to I.363.2 and
I.366.2
H.110 compliant TDM bus carrying PCM,
ADPCM or HDLC channels
HDLC channels can be used to carry UDP
payload or AAL2 CPS-packet generated by
external agent
Support trunking in RTP and AAL2; up to 255
PCM/ADPCM channels per RTP connection or
Compatibility Clocks
and Frame
Message Channel
H.110
H100 Signals
*Typical RAM size for the support of 1023 channels. Parity bis are optionnal on all memories.
MT92220
Memory Bank A
DataPath
TDM
Interface
(256k x18*)
H100/
H110
SSRAM
Figure 1 - MT92220 Block Diagram
Dual Memory Controler
Pad
SS/Padding
(8K to16.384M PLL)
Calculator
Recovery
MT9043
MT9041
optional
Clock
Memory Bank B
Service Timer
(512k x18*)
SS
SSRAM
RTP/AAL2
Assembly
Disassembly
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RTP/AAL2
DS5828
Intel/Motorola
Interface
AAL2 CID
Support maximum 1500 bytes packet size
Up to 4096 bytes of jitter buffer, absorbing +/- 256
ms of PDV
Less than 250 usec of latency
Injection of CPU-generated RTP or AAL2 CPS-
packets
Reception of CPU-destinated RTP or AAL2 CPS-
packets
Primary and secondary network interfaces
Primary network interface supports 10/100 MII,
POS-PHY or Utopia level 1/2
Secondary network interface supports Utopia
level 1
CPU
1023 Channel Voice Over IP/AAL2
uP
(256k x36*)
SSRAM
Memory Bank C
Controler
Network
Memory
Identification
and Routing
Interface
Interface
Network
Network
Second
Primary
Packet
(4M x32*)
SDRAM
MT92220
Ordering Information
-40°C to +85°C
Issue 3
MII, POS, or
UTOPIA (PHY/SAR)
interface
UTOPIA Port B
(PHY/SAR)
608 Pin EPBGA
Processor
Data Sheet
MT92220
December 2002
i
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