MT54V512H18A Micron Semiconductor Products, Inc., MT54V512H18A Datasheet - Page 8

• Manufacturer Part Number: MT54V512H18A
• Description: 9Mb QDR SRAM, 2.5V Vdd, Hstl, 2-Word Burst,
• Manufacturer: Micron Semiconductor Products, Inc.

Table 4:
Notes 1-6
Table 5:
Note 7
NOTE:
512K x 18 2.5V V
MT54V512H18A_16_A.fm - Rev 10/02
1. X means “Don’t Care.” H means logic HIGH. L means logic LOW. ­ means rising edge; ¯ means falling edge.
2. Data inputs are registered at K and K# rising edges. Data outputs are delivered at C and C# rising edges, except if C
3. R# and W# must meet setup/hold times around the rising edge (LOW to HIGH) of K and are registered at the rising
4. This device contains circuitry that will ensure the outputs will be in High-Z during power-up.
5. Refer to state diagram and timing diagrams for clarification.
6. It is recommended that K = K# = C = C# when clock is stopped. This is not essential, but permits most rapid restart by
7. Assumes a WRITE cycle was initiated. BW0# and BW1# can be altered for any portion of the BURST WRITE operation
OPERATION
OPERATION
WRITE Cycle:
Load address, input write data on
consecutive K and K# rising edges
READ Cycle:
Load address, output data on
consecutive C and C# rising edges
NOP: No operation
STANDBY: Clock stopped
WRITE D0-17 at K rising edge
WRITE D0-17 at K# rising edge
WRITE D0-8 at K rising edge
WRITE D0-8 at K# rising edge
WRITE D9-17 at K rising edge
WRITE D9-17 at K# rising edge
WRITE nothing at K rising edge
WRITE nothing at K# rising edge
and C# are HIGH, then data outputs are delivered at K and K# rising edges.
edge of K.
overcoming transmission line charging symmetrically.
provided that the setup and hold requirements are satisfied.
DD
, HSTL, QDRb2 SRAM (Footer Desc variable)
Truth Table
BYTE WRITE Operation
Stopped
L®H
L®H
L®H
K
0.16µm Process
8
R#
X
H
X
L
2.5V V
Micron Technology, Inc., reserves the right to change products or specifications without notice.
L
L
L
L
®
®
®
®
K
W#
H
H
H
H
H
X
X
L
DD
L
L
L
L
, HSTL, QDRb2 SRAM
®
®
®
®
K#
Q = High-Z
D
Q
C(t + 1)­
Previous
H
H
H
H
D or Q
A
A
D = X
K(t)­
State
(A + 0)
(A + 0)
at
at
BW0#
0
0
0
0
1
1
1
1
512K x 18
©2002, Micron Technology Inc.
Q = High-Z
Q
C#(t + 1)­
D
Previous
ADVANCE
D or Q
A
A
K#(t)­
D = X
State
(A + 1)
(A + 1)
at
at
BW1#
0
0
1
1
0
0
1
1