MT28C3212P2 Micron Semiconductor Products, Inc., MT28C3212P2 Datasheet - Page 39

• Manufacturer Part Number: MT28C3212P2
• Description: 2 Meg X 16 Page Flash, 128K X 16 SRAM Combo Memory, 66-ball Fbga
• Manufacturer: Micron Semiconductor Products, Inc.

2 Meg x 16 Page Flash 128K x 16 SRAM Combo Memory
MT28C3212P2FL_2.p65 – Rev. 2, Pub. 4/02
OFFSET
2A, 2B
19, 1A
2D, 2E
02–0F
10, 11
13, 14
15, 16
17, 18
2F, 30
31, 32
33, 34
35, 36
1D
00
01
12
1B
1C
1E
1F
20
21
22
23
24
25
26
27
28
29
2C
0003, 0000
0039, 0000
0000, 0000
0000, 0000
0000, 0000
0037, 0000
0007, 0000
0000, 0001
0020, 0000
0006, 0000
0000, 0001
0007, 0000
0037, 0000
0051,0052
reserved
DATA
00B4
00C6
000C
0059
0017
0022
0003
0000
0009
0000
0000
0003
0000
0016
0001
0000
0003
2Ch
A2h
A3h
Typical timeout for single byte/word program, 2
Typical timeout for maximum size multiple byte/word program, 2
Typical timeout for individual block erase, 2
Typical timeout for full chip erase, 2
Maximum timeout for maximum size multiple byte/word program, 2
Maximum timeout for individual block erase, 2
Maximum timeout for full chip erase, 2
Device size, 2
Bus Interface x8 = 0, x16 = 1, x8/x16 = 2
Flash device interface description 0000 = async
Number of erase block regions within device (4K words and 32K words)
Manufacturer Code
Top Boot Block Device Code
Bottom Boot Block Device Code
Reserved
“QR”
“Y”
Primary OEM Command Set
Address for Primary Extended Table
Alternate OEM Command Set
Address for OEM Extended Table
V
V
V
V
supported
Maximum timeout for single byte/word program, 2
supported
Maximum number of bytes in multi-byte program or page, 2
Top boot block device erase block region information 1, 8 blocks …
Bottom boot block device erase block region information 1, 8 blocks …
Top boot block device ...of 8KB
Bottom boot block device ...of 8KB
7 blocks of …
……64KB
Top boot block device 56 blocks of
Bottom boot block device 56 blocks of
CC
CC
PP
PP
MIN for Erase/Write; Bit7–Bit4 Volts in Hex; Bit3–Bit0 100mV in BCD
MAX for Erase/Write; Bit7–Bit4 Volts in Hex; Bit3–Bit0 100mV in BCD
MIN for Erase/Write; Bit7–Bit4 Volts in BCD; Bit3–Bit0 100mV in BCD
MAX for Erase/Write; Bit7–Bit4 Volts in BCD; Bit3–Bit0 100mV in BCD
n
bytes
(continued on the next page)
Table 15
CFI
39
128K x 16 SRAM COMBO MEMORY
n
DESCRIPTION
ms, 0000 = not supported
n
ms, 0000 = not supported
n
Micron Technology, Inc., reserves the right to change products or specifications without notice.
ms, 0000 = not supported
n
n
2 MEG x 16 PAGE FLASH
ms, 0000 = not supported
µs, 0000 = not supported
n
µs, 0000 = not supported
n
n
µs, 0000 = not
n
µs, 0000 = not
©2002, Micron Technology, Inc.