WM8148 Wolfson Microelectronics Ltd., WM8148 Datasheet - Page 21

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WM8148

Manufacturer Part Number
WM8148
Description
WM8148 : 12-BIT/12 MSPS Ccd/cis Analogue Front End/digitiser
Manufacturer
Wolfson Microelectronics Ltd.
Datasheet
WM8148
DIGITAL MANAGEMENT INTERFACE (DMI)
SERIAL INTERFACE
WOLFSON MICROELECTRONICS LTD
Figure 21 Output Data for 2 x 8-bit and 12 bit Output.
Where:
A = < d11, d10, d9, d8, d7, d6, d5, d4 >
B = < d3, d2, d1, d0, TVIOL, CC[1], CC[0], OVRNG >
C = < d11, d10, … d1, d0 >
Table 3 Colour Code Bits CC[1:0]
ERROR FLAGS
The two error flags are:
TVIOL: This goes high if the reset sample and clamp positions set up in bits RESREF[3:0], are
inconsistent with the selected mode of operation.
OVRNG: This goes high if the input to the ADC exceeds its input range.
These flags are output in byte B of multiplexed-mode parallel output data as above. Each is also
available via the SDO pin if so configured via the SDO[1:0] register bits.
LATENCY
Default latency from the last rising edge of MCLK during the VSMP pulse to data output depends on
the chosen Input Sampling Mode. To align pixel outputs with post processing circuitry and to reduce
interaction with video sampling instances, the latency through the WM8148 device can be adjusted
by Control bits DEL[1:0] and FDEL[1:0].
The DMI is used to write contents to and read back contents from the internal registers in either serial
or parallel mode. The PNS pin is tied low for serial and high for parallel mode.
REGISTER WRITE
Figure 22 Serial Interface Register Write
COLOUR CODE BITS
CC[1]
M U X O P = 1
M U X O P = 0
OP[11:4]
OP[11:0]
0
0
1
SCK
SEN
SDI
CC[0]
a 5
0
1
0
0
Address
a 3
CHANNEL
a 2
Green
A
Blue
Red
a 1
a 0
b 7
C
b 6
b 5
Data Word
b 4
B
b 3
b 2
b 1
b 0
PD Rev 4.0 April 1999
Production Data
21

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