WM8144-10 Wolfson Microelectronics Ltd., WM8144-10 Datasheet

WM8144-10

Manufacturer Part Number

WM8144-10

Description

Integrated 10-bit Data Acquisition System For Imaging Applications

Manufacturer

Wolfson Microelectronics Ltd.

Datasheet

1.WM8144-10.pdf (27 pages)

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Block Diagram

RINP

GINP

BINP

Production Data data sheets contain fi-

nal specifications current on publication

date. Supply of products conforms to

Wolfson Microelectronics standard terms

and conditions

Description

WM8144-10 integrates the analogue signal conditioning

required by CCD sensors with a 10-bit ADC and optional

pixel-by-pixel image compensation. WM8144-10 requires

minimal external circuitry and provides a cost effective

sensor-to-digital domain system solution.

Each analogue conditioning channel provides reset level

clamp, CDS, fine offset level shifting and gain

amplification. The three channels are multiplexed into the

ADC. Output from the ADC can either be direct or passed

through a digital post-processing function. The post-

processing provides compensation for variations in offset

and shading on a pixel-by-pixel basis.

The flexible output architecture allows ten-bit data to be

accessed either on a ten-bit bus or via a time-multiplexed

eight-bit bus. The WM8144-10 can be configured for pixel-

by-pixel or line-by-line multiplexing operation. Reset level

clamp and/or CDS features can be optionally bypassed.

Device configuration is either by a simple serial or eight-

bit parallel interface.

Integrated 10-bit Data Acquisition system for

MID

RLC

S/H

CDS

S/H

MUX

5-BIT REG

Imaging Applications

PGA

Tel: +44 (0) 131 667 9386

Lutton Court, Bernard Terrace, Edinburgh EH8 9NX, UK

Wolfson Microelectronics

8-BIT + SIGN

DAC

8-BIT + SIGN

DAC

8-BIT + SIGN

DAC

www: http://www.wolfson.co.uk

MID

email: admin@wolfson.co.uk

TIMING CONTROL

OFFSET

VSMP

MID

MCLK

Fax: +44 (0) 131 667 5176

Features

•

Applications

•

RLC

Reset level clamp

Correlated Double Sampling (CDS)

Fine offset level shifting

Programmable Gain Amplification

10-Bit ADC with maximum 6 MSPS

Digital post-processing for pixel-by-pixel

image compensation

Simple clocking scheme

Control by serial or parallel interface

Time-multiplexed eight-bit data output mode

48 pin TQFP package

Pin compatible with WM8144-12

Document scanners

CCD sensor interfaces

Contact image sensor (CIS) interfaces

WM8144-10

10 BIT

ADC

IMAGE

COMPENSATION

PROCESSING

EXTERNAL

DATA STORE

INTERFACE

CONFIGURABLE

SERIAL/PARALLEL

CONTROL INTERFACE

VDD

WM8144-10

GND

October 1997 Rev. 3.0

VDD1

10/8

MUX

VDD2

Production Data

GND

CDATA(7:0)

ORNG

OEB

OP[9:0]

PNS

SDI / DNA

SCK / RNW

SEN / STB

NRESET

CC[2:0]

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