ATA5423 ATMEL Corporation, ATA5423 Datasheet - Page 84

• Manufacturer Part Number: ATA5423
• Manufacturer: ATMEL Corporation

13. Electrical Characteristics: 1–Battery Application (Continued)
All parameters refer to GND and are valid for T
f
84
RF
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
Note:
9.10
9.11
9.12
9.13
9.14
9.15
9.16
9.17
No.
9.9
= 315 MHz/345 MHz/433.92 MHz/868.3 MHz/915 MHz unless otherwise specified
1. The voltage of VAUX may rise up to 2 V. The current I
Parameters
Current in IDLE mode
on pin VS1 and VS2
Supply current
IDLE mode
Current in RX mode on
pin VS1and VS2
Supply current
RX mode
Current during
T
and VS2
Current in
RX polling mode on pin
VS1 and VS2
Supply current
RX polling mode
Current in TX mode on
pin VS1 and VS2
Supply current
TX mode
ATA5423/25/28/29 [Preliminary]
Startup_PLL
on pin VS1
I
Test Conditions
V
I
CLK enabled
V
CLK disabled
V
V
V
I
CLK enabled
V
V
I
CLK enabled
V
CLK disabled
V
V
V
I
Pout = 5 dBm/10 dBm
315 MHz/5 dBm
315 MHz/10 dBm
345 MHz/5 dBm
345 MHz/10 dBm
433.92 MHz/5 dBm
433.92 MHz/10 dBm
868.3 MHz/5 dBm
868.3 MHz/10 dBm
915 MHz/5 dBm
915 MHz/10 dBm
CLK enabled
V
CLK disabled
V
P
VSOUT
VSOUT
VSOUT
VSOUT
VS1
VSOUT
VSOUT
VSOUT
VS1
VSOUT
VS1
VSOUT
VSOUT
VSOUT
VS1
VSOUT
VSOUT
=
= V
= V
= V
= V
I
---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- -
IDLE_VS1,2
= 0
= 0
= 0
= 0
enabled
enabled
disabled
enabled
enabled
enabled
disabled
enabled
enabled
VS2
VS2
VS2
VS2
amb
3 V
3 V
3 V
3 V
= 25°C, V
T
SLEEP
VS1
17, 18,
17, 18,
17, 18,
17, 18,
17, 18
22, 27
17, 18
22, 27
17, 18
22, 27
17, 18
22, 27
+
Pin
I
Startup_PLL_VS1,2
= V
T
Sleep
VAUX
VS2
I
+
= 3.0 V. Application according to
Startup_PLL_VS1, 2
may not exceed 100 µA.
T
I
I
TX_VS1_VS2
IDLE_VS1, 2
I
Symbol
Startup_PLL
RX_VS1, 2
I
I
S_IDLE
I
I
S_Poll
S_RX
S_TX
T
Startup_PLL
+
T
Startup_Sig_Proc
Min.
+
I
I
S_IDLE
I
RX_VS1,2
I
S_RX
S_TX
Typ.
10.5
10.3
15.7
TBD
TBD
10.5
15.8
11.2
17.3
TBD
TBD
312
260
225
I
8.8
S_Poll
I
S_TX
+
= I
= I
= I
T
Figure 2-1 on page
I
S_Poll
IDLE_VS1, 2
RX_VS1, 2
TX_VS1, 2
Bitcheck
= I
= I
I
S_Poll
P
T
TX_VS1, 2
Max.
11.5
13.4
20.5
TBD
TBD
13.5
20.5
14.5
22.5
TBD
TBD
= I
430
370
320
Startup_Sig_Proc
+ I
14
P
VSINT
= I
+ I
+ I
+ I
+ I
P
VSINT
VSINT
EXT
+ I
VSINT
+ I
Unit
EXT
mA
mA
mA
µA
µA
µA
EXT
+ I
+ I
4841A–RKE–02/05
+ I
EXT
7.
EXT
+
EXT
T
Bitcheck
Type*
C
A
B
B
A
B