ATA5423 ATMEL Corporation, ATA5423 Datasheet - Page 34

• Manufacturer Part Number: ATA5423
• Manufacturer: ATMEL Corporation

Figure 5-3.
34
V
ATA5423/25/28/29 [Preliminary]
V
DVCC_RESET
Thres_2
Thres_1
VSOUT_EN
(Control Register 3)
Reset Timing
N_RESET
= 2.38 V (typ)
(Status Register)
= 2.3 V (typ)
Low_Batt
VSOUT
(AVCC)
DVCC
CLK
The status bit Low_Batt is set to “1” if the voltage at pin VSOUT V
(typically 2.38 V). Low_Batt is set to “0” if V
via the 4–wire serial interface or N_RESET is set to low.
If V
trol register 3 is “1”, a DVCC_RESET is also generated. If V
connected microcontroller by setting bit VSOUT_EN = 0, no DVCC_RESET is generated.
Note:
VSOUT
If VSOUT < V
is disabled and the transceiver is not programmable via the 4-wire serial interface.
drops below V
1.5 V (typ)
V
VSOUT
V
VSOUT
> 2.3 V and the XTO is running
Thres_1
> 2.38 V and the XTO is running
Thres_1
(typically 2.3 V) the output of the pin CLK is low, the Microcontroller_Interface
(typically 2.3 V), N_RESET is set to low. If bit VSOUT_EN in con-
VSOUT
exceeds V
Thres_2
VSOUT
and the status register is read
was already disabled by the
VSOUT
drops below V
4841A–RKE–02/05
Thres_2