CMX649E3 CML Microcircuits, CMX649E3 Datasheet - Page 36

• Manufacturer Part Number: CMX649E3
• Description: ADM Codec
• Manufacturer: CML Microcircuits

ADM Codec
5.2.2
PROCESSOR STATUS READ Register ($80)
Reading this STATUS register clears any pending IRQ. The PCM and ADM data available and data
needed flags (bits 5, 4, 1 and 0 respectively) are cleared when the appropriate CBUS register is read (or
written), in order to service the IRQ. The VAD detection flags (bits 6 and 2) are constantly updated to
indicate the status of voice activity. Any change in state of either flag will cause an IRQ to be generated.
Encoder Status
(Bits 7 – 4)
Decoder Status
(Bits 3 – 0)
DECODE VAD LEVEL OUTPUT READ Register ($D4)
Decode VAD
Level Output
(Bits 15 – 0)
DECODE VAD OFFSET LEVEL OUTPUT READ Register ($D5)
Decode Offset
Level Output
(Bits 15 – 0)
DECODE LINEAR PCM OUTPUT READ Register ($D6)
Decode Linear
PCM Output
(Bits 15 – 0)
2002 CML Microsystems Plc
Read Only Register Description
Bit 7 is permanently set to logic 0.
A logic 1 in Bit 6 indicates Voice Activity is detected.
A logic 1 in Bit 5 indicates PCM data is available (or needed when transcoding)
A logic 1 in Bit 4 indicates ADM samples are available (or needed when
transcoding).
Bit 3 is permanently set to logic 0.
A logic 1 in Bit 2 indicates Voice Activity is detected.
A logic 1 in Bit 1 indicates PCM data is needed (or available when transcoding).
A logic 1 in Bit 0 indicates ADM samples are needed (or available when
transcoding).
These bits indicate the average amplitude of the envelope of the audio signal. This
negative 2’s complement number can range from $0 to $8000 (0 to -32768 and can
be used to assist in calculating an appropriate value to be programmed into the
DECODE VAD THRESHOLD Register ($D2). The equation for the VAD level
register value is:
When offset tracking is enabled these bits indicate the average amplitude of the
estimated offset. The number format is 2’s complement and ranges from $8000
through $0000 to $7FFF (-32768 to 32767).
The equation for the offset value is:
Since offset tracking is only applicable to the decoder when transcoding from PCM to
ADM, this register essentially contains a value that is 8x the DC component of the
input PCM signal.
When offset tracking is disabled these bits indicate the offset level as input by the
user in register $D3.
This register contains the linear PCM equivalent of the ADM or non-linear PCM input
signal. The number format is 2’s complement and ranges from $8000 through $0000
to $7FFF (-32768 to 32767). Bit 1 of the CODEC INTERRUPT CONTROL Register
($81) can be set to a logic 1 to enable interrupts informing a micro-controller when
the register has been updated.
Register
Register
Value
Value
36
(DAC
(DAC
-1
(Envelope
Full
Full
(Offset
Scale
Scale
Voltage)
voltage
Reference
Reference
level)
2
18
Voltage)
Voltage)
2
15
CMX649
D/649/1