CMX649E3 CML Microcircuits, CMX649E3 Datasheet - Page 30

• Manufacturer Part Number: CMX649E3
• Description: ADM Codec
• Manufacturer: CML Microcircuits

ADM Codec
Zero Selection
(Bits 2 – 1)
Zero at ½ Bit
Rate
(Bit 0)
DECODE VAD THRESHOLD Register ($D2)
Decode VAD
Threshold
(Bits 15 – 0)
DECODE OFFSET LEVEL Register ($D3)
Decode Offset
Input
(Bits 15 – 0)
DECODE LINEAR PCM INPUT Register ($D7)
Decode Linear
PCM Input
(Bits 15 – 0)
2002 CML Microsystems Plc
When second order integration is used, a zero can be inserted to help encoder
stability. Not generally used in the decoder unless set to digitally transcode from
PCM to ADM.
When decoding ADM, a zero at (bit rate)/2 can be enabled by setting this bit to
logic 1. When transcoding from PCM to ADM this bit should always be set to logic 0
to avoid instability in the transcoding loop.
These bits directly program the threshold of detection for the Voice Activity Detector.
The number programmed into this register can range from $0 to $7FFF (0 to 32767).
The equation for the VAD threshold is:
For normal Decoder operation this register does not need loading.
These bits allow for an offset amount to be directly programmed. This offset amount
is useful in trimming out offsets that may occur in the on-chip analog circuitry. The
number format is 2’s complement and ranges from $8000 through $0000 to $7FFF
(-32768 to 32767).
The equation for the Offset value is:
The programmed offset will be summed with the decoder output signal.
When offset tracking is enabled (Bit 8 of register $D0), e.g. while transcoding PCM
to ADM, this register can be loaded with a small positive constant (e.g. in the range
[2-16]) to allow automatic DC nulling for best idle channel performance. This is not
needed if the PCM signal already has zero DC.
This register allows input of linear PCM via C-BUS for transcoding. The number
format is 2’s complement and ranges from $8000 through $0000 to $7FFF (-32768 to
32767). Bit 1 of the CODEC INTERRUPT CONTROL Register ($81) can be set to a
logic 1 to enable interrupts informing a micro-controller when the register should be
updated.
Bit 2
0
0
1
1
Register
Register
Bit 1
0
1
0
1
Value
Value
30
Time Constant (ms), Bit Rate in kbps
N/A (select for first order estimator).
(DAC
(DAC
(Signal
Full
Full
(Offset
Detection
Scale
Scale
1.5/Bit Rate
2.5/Bit Rate
4.5/Bit Rate
Voltage)
Reference
Reference
Threshold)
2
18
Voltage)
Voltage)
2
15
CMX649
D/649/1