CMX649E3 CML Microcircuits, CMX649E3 Datasheet
CMX649E3
Related parts for CMX649E3
CMX649E3 Summary of contents
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... CML Microcircuits COMMUNICATION SEMICONDUCTORS D/649/1 June 2002 Features Multiple Codec Modes 128 kbps - - Full duplex ADM and CVSD - - Full duplex PCM: µ-law, A-law, Linear - - Configurable ADM time constants - - Dual channel transcoder/decoder mode High Performance Digital Architecture Low Power: 1.9mA at 2.7V 2 ...
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ADM Codec The CMX649 ADM Voice Codec supports 2.7V to 5.5V operation and is available in 20-pin SOIC (D3) and TSSOP (E3) packages. Section 1. Brief Description.................................................................................. 1 2. Block Diagram ..................................................................................... 3 3. Signal List ............................................................................................ 4 4. External ...
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ADM Codec 2. Block Diagram PROGRAMMABLE ANTI-ALIAS FILTER MIC OUT + - MIC - + MIC + AAF/AIF VDD BW REG $61 VREF VBIAS VSS AUDIO LEVEL REG $63 ANALOG POWER CONTROL REGS $64 & $65 AUDIO FILTER PRE- SCALER ...
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ADM Codec 3. Signal List SOIC (D3) TSSOP (E3) Package Package Pin No. Pin No ...
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... CMX649 area to provide a low impedance connection between the V pin and the V SS 2002 CML Microsystems Plc STRB 1 ENCODE VAD 2 VDD 3 MIC OUT 4 MIC+ 5 CMX649E3 MIC VBIAS 7 AUDIO OUT 8 VSS 9 DECODE VAD 10 C5 100k 10% ...
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ADM Codec 5. General Description The CMX649 encodes and decodes analog audio signals to/from ADM, Linear PCM, µ-law PCM or A-law PCM. It has programmable clock dividers that enable it to use a range of 4-16 MHz crystal clocks and ...
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ADM Codec PCM OUTPUT REG $D6 DECODER OUT The estimator integrators (principal and second) as well as the step size decay (companding integrator) have programmable time constants. Additionally, the minimum and maximum step height and the depth of the delay ...
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ADM Codec rate. Decoding PCM simply requires interpolation and filtering to compensate for sin(x)/x roll-off of zero holding the PCM samples. The interpolation ratio can be programmed PCM OUTPUT REG $D6 DECODER OUT 5.1.3 Transcoding with ...
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ADM Codec (note that the encoder can also be configured to do this function and in this example all data is read and written via C-BUS registers $D6 ($E6) and $D8 ($E8) respectively (for encoder)) 5.1.4 Non-Linear Instantaneous Companding When ...
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ADM Codec C1, C3 C2, C4 2002 CML Microsystems Plc 100 pF C6 20% C7 0.01 F 20% 10 1.0 F 20% 1.0 F 20% CMX649 D/649/1 ...
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ADM Codec 5.1.7 Programmable Anti-alias/image SC Filters The anti-aliasing (AAF) and anti-imaging (AIF) switched capacitor (SC) filters have a programmable cut- off frequency to accommodate different input signal bandwidths. Typically, the audio filter bandwidth should be programmed to be 1/10 ...
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ADM Codec The clock recovery circuit is normally applied to the decoder. However possible to use the recovered clock for the encoder section as well. This supports systems where the base unit is using an internal clock or ...
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ADM Codec Time Constants $D0 & $E0 constant factor 2002 CML Microsystems Plc PCM | y | SIGNAL decay C 1/4 attack time 1/8 1/16 1/32 Figure 11 VAD Block Diagram 13 VAD LEVEL $D4 & $E4 VAD + OUT ...
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ADM Codec 5.2 C-BUS Description Address/Commands Instructions and data are transferred, via C-BUS, in accordance with the timing information given in Figure 12. Instruction and data transactions to and from the CMX649 consist of an Address/Command (A/C) byte followed by ...
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ADM Codec HEX REGISTER ADDRESS/ NAME COMMAN D DECODER DEC BY MODE AND $D0 SETUP (1) (2) DECODE ADM $D1 CONTROL (1) (2) DECODE VAD THRESHOLD $D2 (1) (2) DECODE OFF- $D3 SET LEVEL (1) (2) DECODE LINEAR PCM $D7 ...
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ADM Codec HEX REGISTER ADDRESS/ NAME COMMAN D ENCODE DAC $E7 INPUT (1) (2) ENCODE ADM $E8 INPUT Read Only C-BUS Registers HEX REGISTER ADDRESS/ NAME COMMAN D CODEC STATUS $80 (READ) DECODE VAD LEVEL $D4 OUTPUT (1) (2) DECODE ...
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ADM Codec HEX REGISTER ADDRESS/ NAME COMMAN D ENCODE VAD OFFSET LEVEL $E5 OUTPUT (1) (2) ENCODE LINEAR PCM $E6 OUTPUT (1) (2) ENCODE ADM $EA OUTPUT 5.2.1 Write Only Register Description GENERAL RESET ($01) The reset command has no ...
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ADM Codec VOLUME/SIDETONE LEVEL Register ($62) Volume Level The five most significant bits in this register are used to set the gain of the volume control according to the table below: (Bits 7 – 3) Bit 7 Bit 6 0 ...
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ADM Codec Sidetone Level These bits control the gain of the sidetone signal coming from the AAF output to be summed in with the decode signal at the input to the AIF. (Bits 2 – 1) When this bit is ...
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ADM Codec These bits are reserved and should be set to a logic 0. Reserved (Bits 2– 0) POWER CONTROL 1 Register ($64) These bits are dedicated to power/current control for the AAF. Note necessary AAF Power to ...
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ADM Codec POWER CONTROL 2 Register ($65) MIC AMP These bits are dedicated to power/current control for the Microphone Amplifier. Power Control (Bits 7 – 6) Bit 7 Bit AUDIO DCA ...
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ADM Codec CODEC MODE CONTROL Register ($70) These bits are reserved and should be set to a logic 0. Reserved (Bits 7 – 3) CODEC MODE (Bits 2 – 0) Bit ...
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ADM Codec CLK DIVIDER CONTROL Register ($72) Pre-Scaler Setting this bit to a logic 1 enables the pre-scaler divider. Enable (Bit 15) Setting this bit to a logic 1 enables the decode bit clock. Decode Bit Clock Enable (Bit 14) ...
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ADM Codec These bits control the decode bit clock divider. Decode Bit Clock Divider (Bits 5 – 3) Bit Encode Bit These bits control the encode bit clock divider. Clock Divider ...
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ADM Codec CLK SOURCE CONTROL Register ($73) Set to a logic 0. Reserved (Bit 15-14) Phase Detect Input Select 0 = PLL locks to external input clock (Bit 13 PLL locks to external input strobe PLL ...
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ADM Codec Setting this bit to a logic 1 forces the data filter to narrow mode. Data Filter Bandwidth (Bit 0) CODEC INTERRUPT CONTROL Register ($81) Encoder Control (Bits 7 – 4) Bit 7 Bit Bit ...
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ADM Codec If PCM filter interpolates, the decoder can digitally transcode a PCM signal to ADM. If PCM filter decimates, the decoder can digitally transcode an ADM signal to PCM. ADM Input Select (Bits 12 – 11) Decoder Output Select ...
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ADM Codec Decoder VAD Allows selection of the Voice Activity Detector attack time constant. Attack Time Constant (Bits 4 – 3) Allows selection of the Voice Activity Detector output source. Decoder VAD Output Source (Bits 2 – 1) Reserved This ...
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ADM Codec Companding This is the number of consecutive ones or zeros that must occur for the step size to be adjusted. Rule (Bits 9 – 8) Allows selection of the estimator integrator time constant. Estimator Integrator Time Constant (Bits ...
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ADM Codec Zero Selection When second order integration is used, a zero can be inserted to help encoder stability. Not generally used in the decoder unless set to digitally transcode from (Bits 2 – 1) PCM to ADM. When decoding ...
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ADM Codec DECODE ADM INPUT Register ($D8) This register allows ADM bits to be written into the decoder via C-BUS and is Decoder ADM intended for transcoding. Bit 0 of the CODEC INTERRUPT CONTROL Register Input ($81) can be set ...
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ADM Codec Local Decoder Bit 10 Output Select 0 (Bits 10 – For the Encoder this bit should normally be set to a logic 1 to allow analog offsets to Track Offset be automatically compensated. When ...
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ADM Codec For normal operation this bit should be set to a logic 0. Setting this bit to a logic 1 ADM Output allows arbitrary ADM streams, written in via the ENCODE ADM INPUT Register Select ($E8 output. ...
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ADM Codec Allows selection of the estimator integrator time constant. Estimator Integrator Time Constant (Bits 7 – 5) Second Order Allows selection of the second order estimator time constant. Estimator Time Constant (Bits 4 – 3) When second order integration ...
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ADM Codec ENCODE VAD THRESHOLD Register ($E2) Encode VAD These bits directly program the threshold of detection for the Voice Activity Detector. The number programmed into this register can range from $0 to $7FFF (0 to 32767). Threshold The equation ...
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ADM Codec 5.2.2 Read Only Register Description PROCESSOR STATUS READ Register ($80) Reading this STATUS register clears any pending IRQ. The PCM and ADM data available and data needed flags (bits and 0 respectively) are cleared when ...
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ADM Codec The equation for the PCM register value is: DECODE ADM OUTPUT READ Register ($DA) This register allows ADM bits to be read via C-BUS and is updated every eighth bit. Decode ADM Bit 0 of the CODEC INTERRUPT ...
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ADM Codec ENCODE ADM OUTPUT READ Register ($EA) Encode ADM This register allows Encoder ADM bits to be read via C-BUS and is updated every eighth bit. Bit 4 of the CODEC INTERRUPT CONTROL Register ($81) can be set to ...
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ADM Codec 6. Application Notes 6.1 C-BUS Operation C-BUS Operation Instructions, status and data are transferred between the CMX649 and the host C over the C-BUS. The C-BUS protocol complies with the CML C-BUS Hardware Interface specification. Instruction and data ...
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ADM Codec 6.2 CODEC Data Interface Clock generation (internal clock - Master mode) non burst mode Synchronous operation (external clock – Slave mode) Max Frame length : limited by burst clock to bit rate ratio only Burst_CLK frequency : 5MHz ...
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ADM Codec 6.3 Example CODEC Setups and Application Help Below are tabulated some applicable settings for the CLOCK DIVIDER CONTROL Register ($72) . Audio Switched Capacitor Filter Clock Settings (clock frequency in kHz) Crystal vs Audio Filter Divider Chart for ...
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ADM Codec When selecting divider settings to arrive at a desired bit rate from a given crystal frequency, note that some power savings are realized by selecting a lower divider value in conjunction with a higher prescaler value, thus minimizing ...
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ADM Codec Applicable Bit Rate (kbps) Settings with Bit Rate Prescaler = 3 Divider values Register bits clk ctrl[5:3] [2:0] 000 Crystal Freq MHz clk ctrl[7: 20.833 4.032 10 21.000 10 4.096 21.333 10 8 41.667 8.064 10 ...
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ADM Codec 6.3.1 32kbps ADM with clock and data recovery //Initialize device with general reset // This powers down everything excluding the xtal oscillator circuit $01 //Setup analog section // $61 00 filters set for 2.9kHz BW (default after reset) ...
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ADM Codec 6.3.2 64kbps burst mode Bluetooth CVSD //Initialize device with general reset // This powers down everything excluding the xtal oscillator circuit $01 //Setup analog section // $61 00 filters set for 2.9kHz BW (default after reset) // volume=0dB ...
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ADM Codec //$D3 $00 $04 2002 CML Microsystems Plc 46 CMX649 D/649/1 ...
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ADM Codec 7. Performance Specification 7.1 Electrical Performance 7.1.1 Absolute Maximum Ratings Exceeding these maximum ratings can result in damage to the device. Supply ( Voltage on any pin Current into or ...
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ADM Codec 7.1.3 Operating Characteristics The following conditions are assumed unless otherwise specified: V +85°C, Audio Test Frequency = 820Hz, Xtal/Clock f level (0 dBm0) = 489mV . RMS DC Parameters I (powersaved 3. ...
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ADM Codec 7.1.3 (continued) C-BUS Timing Diagram 2002 CML Microsystems Plc Figure 14 C-BUS Timing Diagram 49 CMX649 D/649/1 ...
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ADM Codec C-BUS Timing (see Figure 14) t CSN Enable to SClk high time CSE t Last SClk high to CSN high time CSH t SClk low to ReplyData Output Enable LOZ Time t CSN high to ReplyData high impedance ...
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... ADM Codec 7.2 Packaging Figure 15 20-Lead TSSOP Mechanical Outline: Order as part no. CMX649E3 Figure 16 20-Lead SOIC Mechanical Outline: Order as part no. CMX649D3 2002 CML Microsystems Plc 51 CMX649 D/649/1 ...
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... Winston-Salem - NC 27105 - USA. Tel: +1 336 744 5050, 800 638 5577 Fax: +1 336 744 5054 Sales: us.sales@cmlmicro.com Technical Support: us.techsupport@cmlmicro.com CMX649 CML Microcircuits (Singapore) Pte Ltd COMMUNICATION SEMICONDUCTORS No 2 Kallang Pudding Road - 09 to 05/06 Mactech Industrial Building - Singapore 349307 Tel: +65 7450426 Fax: +65 7452917 Sales: sg ...