CMX649E3 CML Microcircuits, CMX649E3 Datasheet - Page 11

• Manufacturer Part Number: CMX649E3
• Description: ADM Codec
• Manufacturer: CML Microcircuits

ADM Codec
5.1.7 Programmable Anti-alias/image SC Filters
The anti-aliasing (AAF) and anti-imaging (AIF) switched capacitor (SC) filters have a programmable cut-
off frequency to accommodate different input signal bandwidths. Typically, the audio filter bandwidth
should be programmed to be 1/10
reconstruction. For “communications” quality, the audio bandwidth may approach 1/6
rate for ADM rates below 20kbps. The anti-alias/image SC filter bandwidth is programmed directly via C-
BUS commands to the AAF/AIF BANDWIDTH Register ($61). Additionally, the switched capacitor clock
frequency can be altered via C-BUS commands to the CLK DIVIDER CONTROL Register ($72).
Typically, the CLK DIVIDER CONTROL Register should be programmed to provide a 256kHz SC filter
clock. Altering the SC filter clock from the recommended 256kHz frequency proportionally scales the
frequency axis in the plot below:
5.1.8 Data Clock Recovery
Data from the RX DATA pin is driven into a comparator to remove amplitude variations. The output of
the comparator is a logic signal that can be inverted by setting the appropriate control bit in the
SCRAMBLER CONTROL Register ($71). Using the output of the comparator, the clock recovery block
can be enabled to generate a phase-locked clock equal to the CVSD data rate, which is used to clock
data from the RX DATA pin into the decoder. The recovered clock frequency is controlled by the CLK
DIVIDER CONTROL Register ($72). If the clock recovery block is bypassed, data must then be applied
which is synchronised to the clock on the RX CLK pin (either internally generated or externally applied).
External ADM rate bit clocks can be used for both the encoder and decoder paths and do not require use
of the clock recovery PLL. Externally applied clocks act directly as the ADM sample clocks and should
be generated with little jitter for best performance. Please note that the maximum usable frequency of
externally applied bit clocks is 1/60
2002 CML Microsystems Plc
-18
-27
-36
-45
-54
-63
-72
-9
9
0
1000
Figure 10 Anti-Alias/Image Filter Frequency Response
th
th
of the frequency of the output of the internal bit clock prescaler.
of the ADM bit rate (or lower) for “toll” (or better) quality audio
Frequency (Hz)
11
10000
th
of the ADM bit
CMX649
D/649/1
100000