CMX649E3 CML Microcircuits, CMX649E3 Datasheet - Page 12

• Manufacturer Part Number: CMX649E3
• Description: ADM Codec
• Manufacturer: CML Microcircuits

5.1.9 Data Scrambler/De-scrambler
The de-scrambler receives the scrambled data from the data slicer and de-scrambles it to the original
Nine example maximal length codes are represented below through their polynomial coefficients which
5.1.10 Voice Activity Detector (VAD)
ADM Codec
The clock recovery circuit is normally applied to the decoder. However, it is possible to use the recovered
clock for the encoder section as well. This supports systems where the base unit is using an internal clock
or local external clock for transmit and clock recovery for the decoder clock. The remote unit can then be
configured to use the recovered clock for both encode and decode. Internal data clocks for the encoder
and decoder can also be selected for data input and output control.
The scrambler receives digital data from the encoder. It is implemented with a 10-bit programmable
linear feedback shift register (LFSR) allowing a choice of various maximal length scrambling codes. The
scrambler, also known as a randomizer, provides not only a level of communication security, but may
also help reduce the occurrence of abnormally long strings of 1s or 0s.
data as long as the selected LFSR maximal length sequence is the same as that in the transmitting
scrambler. The de-scrambler block has the same configuration as the scrambler and is self-
synchronizing. Both the scrambler and de-scrambler can be bypassed.
can be directly programmed in Bits 9-0 of the SCRAMBLER CONTROL Register ($71):
The VAD function is implemented with an energy detector circuit. This circuit consists of an absolute
value function, an integrator and a threshold detector. The threshold detector level and the integrator
time constants (i.e. attack and decay time control) are user programmable via the DECODE and
ENCODE VAD THRESHOLD Registers ($D2 and $E2) and the DECODER and ENCODER MODE AND
SETUP Registers ($D0 and $E0). Referring to Figure 11, the input to the VAD comes from the PCM
signal. The signal is rectified and averaged with a lossy integrator. The output of the integrator is
compared to the VAD threshold to derive the logic signal VAD_OUT. If VAD_OUT is a logic one, signal
energy greater than the threshold is present. If VAD_OUT is a logic zero, signal energy is below the
threshold. Attack and decay times for the decoder VAD and encoder VAD can be independently
controlled via the DECODER and ENCODER MODE AND SETUP Registers ($D0 and $E0). Typical
attack and decay times used for detecting voice activity are 5ms and 150ms, respectively. The energy
levels may be read from DECODE and ENCODE VAD LEVEL OUTPUT Registers ($D4 and $E4) for the
decoder and encoder and used to adaptively set the detector threshold value by observing the energy
level of background noise.
2002 CML Microsystems Plc
Length
10
2
3
4
5
6
7
8
9
Polynomial coefficients in hex format
12
0x00C
0x08E
0x003
0x006
0x014
0x030
0x060
0x110
0x240
CMX649
D/649/1