MB81ES171625 Fujitsu Media Devices Limited, MB81ES171625 Datasheet - Page 22

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MB81ES171625

Manufacturer Part Number
MB81ES171625
Description
SINGLE DATA RATE I/F FCRAM Consumer/Embedded Application Specific Memory for SiP
Manufacturer
Fujitsu Media Devices Limited
Datasheet
22
MB81ES171625/173225-15-X
*1: Assume all banks are in idle state.
*2: Assume output is in High-Z state.
*3: t
*4: Assume other bank is in active, read or write state.
*5: Assume t
*6: Assume other banks are not in READA/WRITA state.
*7: Assume the last data has been appeared on DQ.
*8: Assume no I/O conflict.
First
command
Minimum Clock Latency or Delay Time for Multi Bank Operation
RRD
READA
WRITA
SELFX
READ
ACTV
WRIT
PALL
MRS
command
PRE
REF
(Min) of other bank (the second command will be asserted) is satisfied.
Second
(other
bank)
Illegal Command.
RAS
(Min) is satisfied.
MRS
BL-1
BL
t
t
*
*
*
t
REFC
REFC
t
t
t
RSC
1,
1,
1,
*
RP
RP
RP
t
2
DAL
*
*
*
2
2
2
ACTV
t
t
*
*
*
*
*
t
t
REFC
REFC
t
RSC
RRD
1,
1,
1,
1,
1,
*
1
1
1
1
1
RP
1
*
*
*
*
*
3
3
3
3
3
READ
*
*
*
*
*
1
1
1
1
1
1
4
6
5
5
6
READA
*
*
*
*
*
1
1
1
1
1
1
4
6
5
5
6
WRIT
*
5,
*
*
*
*
*
1
1
1
1
1
1
4
6
8
5
6
*
8
WRITA
*
5,
*
*
*
*
*
1
1
1
1
1
1
4
6
8
5
6
*
8
PRE
t
t
*
*
t
REFC
REFC
RSC
5,
5,
*
*
*
*
1
1
1
1
1
1
1
5
5
5
5
*
*
6
6
PALL
BL-1
BL
t
t
t
t
t
REFC
REFC
t
RSC
RAS
DPL
*
*
*
*
*
*
1
RP
1
1
t
6
5
5
5
5
6
DAL
REF
BL
BL-1
t
t
t
REFC
REFC
t
t
t
RSC
*
*
*
RP
RP
RP
t
1
1
1
DAL
SELF
BL
BL-1
t
t
*
t
REFC
REFC
t
1,
t
t
RSC
*
*
*
RP
RP
RP
t
1
1
7
DAL
*
7
BL-1
BST
BL
t
t
t
REFC
REFC
t
RSC
*
*
1
1
RP
1
1
1
t
1
1
DAL

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