IXXBB1 Fujitsu Microelectronics, Inc., IXXBB1 Datasheet - Page 66

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IXXBB1

Manufacturer Part Number
IXXBB1
Description
32-bit Proprietary Microcontroller Cmos Fr60 Mb91301 Series
Manufacturer
Fujitsu Microelectronics, Inc.
Datasheet
66
MB91301 Series
3. Interrupt Controller
Hardware Configuration
Principal Functions
Block Diagram
The interrupt controller receives and processes interrupts.
The interrupt controller consists of the following :
• ICR register
• Interrupt priority determination circuit
• Interrupt level and interrupt number (vector) generator
• Hold request removal request generator
The main functions of the interrupt controller are as follows :
• Detect NMI and interrupt requests
• Prioritize interrupts (according to level and number)
• Notify interrupt level of selected interrupt request (to CPU)
• Notify interrupt number of selected interrupt request (to CPU)
• Generate hold request removal requests to the bus master
(DLYIRQ)
If an NMI or interrupt request with an interrupt level other than "11111
(to CPU)
RI00
RI47
UNMI
determination
processing
determination
processing
ICR00
ICR47
LEVEL
NMI
LEVEL
NMI
determination
R-bus
VECTOR
determination
VECTOR
WAKEUP
Determine order of priority
Determine order of priority
5
(“1” when LEVEL
6
(“1” when LEVEL
VECTOR
LEVEL,
genera-
VECTOR
tion
LEVEL,
genera-
tion
B
" occurs, notify recovery from stop mode
11111
HLDREQ
11111
removal
request
HLDREQ
removal
request
B
)
B
)
LEVEL4 to LEVEL40
MHALTI
VCT5 to VCT50

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