IXXBB1 Fujitsu Microelectronics, Inc., IXXBB1 Datasheet - Page 34

• Manufacturer Part Number: IXXBB1
• Description: 32-bit Proprietary Microcontroller Cmos Fr60 Mb91301 Series
• Manufacturer: Fujitsu Microelectronics, Inc.

34
MB91301 Series
Program status (PS)
Condition code register (CCR)
System condition code register (SCR)
Interrupt level mask register(ILM)
S flag
I flag
N flag
Z flag
V flag
C flag
D1, D0 flags
T flags
ILM4 to ILM0 : This register stores the interrupt level mask value. The value in the ILM register is used as
This register holds the program status and is divided into the ILM, SCR, and CCR.
Bit position
: Specifies which stack pointer to use as R15.
: Enables or disables user interrupt requests.
: Indicates the sign when an operation result is represented as a “2” complement integer.
: Indicates whether an operation result is “0”.
: Indicates whether an overflow occurred for an operation result when the operation operand is
: Indicates whether an operation resulted in a borrow or a carry from the most significant bit.
ILM4
represented as a “2” complement integer.
20
0
0
1
: Stores intermediate data for stepwise multiplication operations.
: A flag specifying whether the step trace trap function is enabled or not.
the level mask. Only interrupt requests to the CPU that have an interrupt level that is higher
than the level specified in ILM are accepted.
ILM3
31
19
0
1
1
7
ILM2
18
0
0
1
6
5
S
ILM
ILM1
D1
10
17
0
0
1
4
I
CCR
SCR
D0
9
N
3
ILM0
20
16
0
0
1
T
8
ILM
2
Z
Interrupt Level
1
V
Initial Value
16
PS
XX0
15
31
C
0
0
B
Initial Value
- - 00XXXX
(Medium)
10
SCR
High
Low
8
B
7
Initial Value
01111
CCR
B
0