HMP351U6MMP8C Hynix Semiconductor, HMP351U6MMP8C Datasheet - Page 17

• Manufacturer Part Number: HMP351U6MMP8C
• Description: 240pin Ddr2 Sdram Unbuffered Dimms Based On 2gb M Version
• Manufacturer: Hynix Semiconductor

Rev. 0.1 / May 2008
DQ output access time from CK/CK
DQS output access time from CK/CK
CK high-level width
CK low-level width
CK half period
Clock cycle time, CL=x
DQ and DM input setup time
(differential strobe)
DQ and DM input hold time
(differential strobe)
Control & Address input pulse width for each
input
DQ and DM input pulse width for each input
Data-out high-impedance time from CK/CK
DQS low-impedance time from CK/CK
DQ low-impedance time from CK/CK
DQS-DQ skew for DQS and associated DQ
signals
DQ hold skew factor
DQ/DQS output hold time from DQS
First DQS latching transition to associated clock
edge
DQS input high pulse width
DQS input low pulse width
DQS falling edge to CK setup time
DQS falling edge hold time from CK
Mode register set command cycle time
Write preamble
Write postamble
Address and control input setup time
Address and control input hold time
Read preamble
Read postamble
Auto-Refresh to Active/Auto-Refresh command period
Active to active command period for 1KB page
size products
Active to active command period for 2KB page
size products
Four Active Window for 1KB page size products
Four Active Window for 2KB page size products
Parameter
tAC
tDQSCK
tCH
tCL
tHP
tCK
tDS
tDH
tIPW
tDIPW
tHZ
tLZ(DQS)
tLZ(DQ)
tDQSQ
tQHS
tQH
tDQSS
tDQSH
tDQSL
tDSS
tDSH
tMRD
tWPRE
tWPST
tIS
tIH
tRPRE
tRPST
tRFC
tRRD
tRRD
tFAW
tFAW
Symbol
1240pin DDR2 SDRAM Unbuffered DIMMs
tHP - tQHS
2*tAC min
min(tCL,
tAC min
- 0.25
127.5
3000
min
-450
-400
0.45
0.45
tCH)
0.35
0.35
0.35
37.5
100
175
0.35
200
275
0.6
0.2
0.2
0.4
0.9
0.4
7.5
10
50
2
-
-
-
DDR2-667
tAC max
tAC max
tAC max
+ 0.25
max
+450
+400
0.55
0.55
8000
240
340
0.6
1.1
0.6
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
tHP - tQHS
2*tAC min
min(tCL,
tAC min
- 0.25
127.5
min
2500
-400
-350
tCH)
0.45
0.45
0.35
0.35
125
0.35
0.35
175
250
0.6
0.2
0.2
0.4
0.9
0.4
7.5
50
10
35
45
2
-
-
-
DDR2-800
tAC max
tAC max
tAC max
+ 0.25
max
+400
+350
0.55
0.55
200
300
0.6
1.1
0.6
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Unit Note
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
ns
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ns
ns
ns
ns
1
1
17