DSPIC30F6012A Microchip Technology Inc., DSPIC30F6012A Datasheet - Page 135
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DSPIC30F6012A
Manufacturer Part Number
DSPIC30F6012A
Description
Dspic30f6011a/6012a/6013a/6014a High-performance Digital Signal Controllers
Manufacturer
Microchip Technology Inc.
Datasheet
1.DSPIC30F6012A.pdf
(238 pages)
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19.0
The 12-bit Analog-to-Digital Converter (ADC) allows
conversion of an analog input signal to a 12-bit digital
number. This module is based on a Successive
Approximation Register (SAR) architecture and pro-
vides a maximum sampling rate of 200 ksps. The ADC
module has up to 16 analog inputs which are multi-
plexed into a sample and hold amplifier. The output of
the sample and hold is the input into the converter
which generates the result. The analog reference volt-
age is software selectable to either the device supply
voltage (AV
(V
being able to operate while the device is in Sleep mode
with RC oscillator selection.
FIGURE 19-1:
© 2006 Microchip Technology Inc.
Note: This data sheet summarizes features of this group
of dsPIC30F devices and is not intended to be a complete
reference source. For more information on the CPU,
peripherals, register descriptions and general device
functionality, refer to the “dsPIC30F Family Reference
Manual” (DS70046).
REF
+/V
AN10
AN11
AN12
AN13
AN14
AN15
12-BIT ANALOG-TO-DIGITAL
CONVERTER (ADC) MODULE
REF
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
AN8
AN9
DD
-) pin. The ADC has a unique feature of
V
V
REF
REF
/AV
+
-
SS
) or the voltage level on the
12-BIT ADC FUNCTIONAL BLOCK DIAGRAM
dsPIC30F6011A/6012A/6013A/6014A
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
V
AN1
REF
AV
AV
DD
SS
-
Preliminary
S/H
Sample
CH0
The ADC module has six 16-bit registers:
• ADC Control Register 1 (ADCON1)
• ADC Control Register 2 (ADCON2)
• ADC Control Register 3 (ADCON3)
• ADC Input Select Register (ADCHS)
• ADC Port Configuration Register (ADPCFG)
• ADC Input Scan Selection Register (ADCSSL)
The ADCON1, ADCON2 and ADCON3 registers con-
trol the operation of the ADC module. The ADCHS reg-
ister selects the input channels to be converted. The
ADPCFG register configures the port pins as analog
inputs or as digital I/O. The ADCSSL register selects
inputs for scanning.
The block diagram of the 12-bit ADC module is shown
in Figure 19-1.
Note:
Switches
12-bit SAR
The SSRC<2:0>, ASAM, SMPI<3:0>,
BUFM and ALTS bits, as well as the
ADCON3 and ADCSSL registers, must
not be written to while ADON = 1. This
would lead to indeterminate results.
DAC
Input
16-word, 12-bit
Sample/Sequence
Dual Port
RAM
Comparator
Conversion Logic
Control
Input MUX
Control
DS70143C-page 133