DSPIC30F4013 Microchip Technology Inc., DSPIC30F4013 Datasheet - Page 143

• Manufacturer Part Number: DSPIC30F4013
• Description: Dspic30f3014/4013 High-performance, 16-bit Digital Signal Controllers
• Manufacturer: Microchip Technology Inc.

20.3
The oscillators are controlled with two SFRs,
OSCCON and OSCTUN and one Configuration
register, FOSC.
REGISTER 20-1:
© 2007 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-12
bit 11
bit 10-8
bit 7-6
bit 5
R/W-0
U-0
—
Oscillator Control Registers
POST<1:0>
Unimplemented: Read as ‘0’
COSC<2:0>: Current Oscillator Group Selection bits (Read-Only)
111 = PLL Oscillator; PLL source selected by FPR<4:0> bits
011 = External Oscillator; OSC1/OSC2 pins; External Oscillator configuration selected by FPR<4:0>
010 = LPRC internal low-power RC
001 = FRC internal fast RC
000 = LP crystal oscillator; SOSCI/SOSCO pins
Set to FOS<2:0> values on POR or BOR
Loaded with NOSC<2:0> at the completion of a successful clock switch
Set to FRC value when FSCM detects a failure and switches clock to FRC
Unimplemented: Read as ‘0’
NOSC<2:0>: New Oscillator Group Selection bits
111 = PLL Oscillator; PLL source selected by FPR<4:0> bits
011 = External Oscillator; OSC1/OSC2 pins; External Oscillator configuration selected by FPR<4:0>
010 = LPRC internal low-power RC
001 = FRC internal fast RC
000 = LP crystal oscillator; SOSCI/SOSCO pins
Set to FOS<2:0> values on POR or BOR
POST<1:0>: Oscillator Postscaler Selection bits
11 = Oscillator postscaler divides clock by 64
10 = Oscillator postscaler divides clock by 16
01 = Oscillator postscaler divides clock by 4
00 = Oscillator postscaler does not alter clock
LOCK: PLL Lock Status bit (Read-Only)
1 = Indicates that PLL is in lock
0 = Indicates that PLL is out of lock (or disabled)
Reset on POR or BOR
Reset when a valid clock switching sequence is initiated
Set when PLL lock is achieved after a PLL start
Reset when lock is lost
Read zero when PLL is not selected as a system clock
R/W-0
R-y
bits
bits
OSCCON: OSCILLATOR CONTROL REGISTER
COSC<2:0>
W = Writable bit
‘1’ = Bit is set
LOCK
R-0
R-y
U-0
R-y
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
U-0
CF
—
Note:
dsPIC30F3014/4013
The description of the OSCCON and
OSCTUN SFRs, as well as the FOSC Con-
figuration register provided in this section
are applicable only to the dsPIC30F3014
and
dsPIC30F product family.
R/W-y
U-0
—
dsPIC30F4013
NOSC<2:0>
x = Bit is unknown
LPOSCEN
R/W-y
R/W-0
DS70138E-page 141
devices
OSWEN
R/W-0
R/W-y
in
bit 8
bit 0
the