DSPIC30F4012 Microchip Technology Inc., DSPIC30F4012 Datasheet - Page 229

• Manufacturer Part Number: DSPIC30F4012
• Description: Dspic30f4011/4012 Enhanced Flash 16-bit Digital Signal Controller
• Manufacturer: Microchip Technology Inc.

Timing Specifications
Trap Vectors ....................................................................... 42
Traps ................................................................................... 41
U
UART
© 2007 Microchip Technology Inc.
SPI Master Mode (CKE = 0) ..................................... 196
SPI Master Mode (CKE = 1) ..................................... 197
SPI Slave Mode (CKE = 0) ....................................... 199
SPI Slave Mode (CKE = 1) ....................................... 201
Timer1 External Clock............................................... 187
Timer2 and Timer4 External Clock ........................... 188
Timer3 and Timer5 External Clock ........................... 188
PLL Clock.................................................................. 181
PLL Jitter................................................................... 181
Hard and Soft.............................................................. 42
Trap Sources .............................................................. 41
Address Detect Mode ............................................... 119
Alternate I/O.............................................................. 117
Auto-Baud Support ................................................... 120
Baud Rate Generator................................................ 119
Disabling ................................................................... 117
Enabling and Setting Up ........................................... 117
Loopback Mode ........................................................ 119
Module Overview ...................................................... 115
Operation During CPU Sleep and Idle Modes .......... 120
Receiving Data.......................................................... 118
Reception Error Handling.......................................... 118
In 8-bit or 9-bit Data Mode ................................ 118
Interrupt ............................................................ 118
Receive Buffer (UxRCB) ................................... 118
Framing Error (FERR) ...................................... 119
Idle Status ......................................................... 119
Parity Error (PERR) .......................................... 119
Receive Break .................................................. 119
Receive Buffer Overrun Error (OERR Bit) ........ 118
Unit ID Locations .............................................................. 145
Universal Asynchronous Receiver
W
Wake-up from Sleep ......................................................... 145
Wake-up from Sleep and Idle ............................................. 43
Watchdog Timer (WDT)............................................ 145, 155
WWW Address ................................................................. 228
WWW, On-Line Support ....................................................... 6
dsPIC30F4011/4012
Setting Up Data, Parity and Stop Bit
Transmitting Data ..................................................... 117
UART1 Register Map ............................................... 121
UART2 Register Map ............................................... 121
Transmitter Module (UART) ..................................... 115
Enabling and Disabling............................................. 155
Operation.................................................................. 155
Selections ......................................................... 117
Break ................................................................ 118
In 8-bit Data Mode ............................................ 117
In 9-bit Data Mode ............................................ 117
Interrupt ............................................................ 118
Transmit Buffer (UxTXB) .................................. 117
DS70135E-page 227