DSPIC30F4012 Microchip Technology Inc., DSPIC30F4012 Datasheet - Page 151

• Manufacturer Part Number: DSPIC30F4012
• Description: Dspic30f4011/4012 Enhanced Flash 16-bit Digital Signal Controller
• Manufacturer: Microchip Technology Inc.

21.2.3
Enabling the LP oscillator is controlled with two
elements:
1.
2.
The LP oscillator is on (even during Sleep mode) if
LPOSCEN = 1. The LP oscillator is the device clock if:
• COSC<1:0> = 00 (LP selected as main oscillator)
• LPOSCEN = 1
Keeping the LP oscillator on at all times allows for a
fast switch to the 32 kHz system clock for lower power
operation. Returning to the faster main oscillator still
requires a start-up time.
21.2.4
The PLL multiplies the clock which is generated by the
primary oscillator. The PLL is selectable to have either
gains of x4, x8 or x16. Input and output frequency
ranges are summarized in Table 21-3.
TABLE 21-3:
The PLL features a lock output which is asserted when
the PLL enters a phase locked state. Should the loop
fall out of lock (e.g., due to noise), the lock signal is
rescinded. The state of this signal is reflected in the
read-only LOCK bit in the OSCCON register.
21.2.5
The FRC oscillator is a fast (7.37 MHz, +/-2% nominal),
internal RC oscillator. This oscillator is intended to
provide reasonable device operating speeds without
the use of an external crystal, ceramic resonator or RC
network. Using the x4, x8 and x16 PLL options, higher
operational frequencies can be generated.
The dsPIC30F operates from the FRC oscillator when-
ever the Current Oscillator Selection (COSC<1:0>)
control
(OSCCON<13:12>) are set to ‘01’.
There are four tuning bits (TUN<3:0>) for the FRC
oscillator in the OSCCON register. These tuning bits
allow the FRC oscillator frequency to be adjusted as
close to 7.37 MHz as possible, depending on the
device operating conditions. The FRC oscillator
frequency has been calibrated during factory testing.
Table 21-4 describes the adjustment range of the
TUN<3:0> bits.
© 2007 Microchip Technology Inc.
4 MHz-10 MHz
4 MHz-10 MHz
4 MHz-7.5 MHz
and
The current oscillator group bits, COSC<1:0>.
The LPOSCEN bit (OSCCON register).
F
IN
bits
LP OSCILLATOR CONTROL
PHASE LOCKED LOOP (PLL)
FAST RC OSCILLATOR (FRC)
PLL FREQUENCY RANGE
in
Multiplier
PLL
the
x16
x4
x8
OSCCON
16 MHz-40 MHz
32 MHz-80 MHz
64 MHz-120 MHz
F
OUT
register
TABLE 21-4:
21.2.6
The LPRC oscillator is a component of the Watchdog
Timer (WDT) and oscillates at a nominal frequency of
512 kHz. The LPRC oscillator is the clock source for
the Power-up Timer (PWRT) circuit, WDT and clock
monitor circuits. It may also be used to provide a low-
frequency clock source option for applications where
power consumption is critical and timing accuracy is
not required.
The LPRC oscillator is always enabled at a Power-on
Reset because it is the clock source for the PWRT.
After the PWRT expires, the LPRC oscillator remains
on if one of the following is true:
• The Fail-Safe Clock Monitor is enabled
• The WDT is enabled
• The LPRC oscillator is selected as the system
If one of the above conditions is not true, the LPRC
shuts off after the PWRT expires.
clock via the COSC<1:0> control bits in the
OSCCON register
TUN<3:0>
Note 1: OSC2 pin function is determined by the
dsPIC30F4011/4012
0111
0110
0101
0100
0011
0010
0001
0000
1111
1110
1101
1100
1011
1010
1001
1000
Bits
2: Note that OSC1 pin cannot be used as an
LOW-POWER RC OSCILLATOR
(LPRC)
Primary
(FPR<3:0>).
I/O pin, even if the secondary oscillator or
an internal clock source is selected at all
times.
Center Frequency (oscillator is
running at calibrated frequency)
FRC TUNING
Oscillator
FRC Frequency
+10.5%
+9.0%
+7.5%
+6.0%
+4.5%
+3.0%
+1.5%
-1.5%
-3.0%
-4.5%
-6.0%
-7.5%
-9.0%
-10.5%
-12.0%
DS70135E-page 149
mode
selection