EVX10AS008BGL ETC-unknow, EVX10AS008BGL Datasheet - Page 7

no-image

EVX10AS008BGL

Manufacturer Part Number
EVX10AS008BGL
Description
Adc Single 2.2gsps 10-bit Lvds 152-pin Cbga
Manufacturer
ETC-unknow
Datasheet
Table 3-3.
e2v semiconductors SAS 2008
Parameter
Clock inputs
Clock inputs common voltage range (V
(DC coupled clock input)
AC coupled for LVDS compatibility
Clock input power level (low-phase noise sinewave
input) 100Ω differential
Clock input power level (low-phase noise sinewave
input) 50Ω single ended
Clock input swing (differential voltage)
on each clock input
Clock input swing (single ended; with CLKB =
50Ω to GND)
Clock input capacitance (die)
Clock input resistance
- single-ended
- differential ended
Digital inputs (SDAEN, PGEB, B/GB)
Logic low
Logic high
Digital input DRRB
Logic low
Logic high
Analog controls (GA, SDA)
Voltage range on GA
Voltage range on SDA
Digital Outputs
Logic compatibility
Output levels 50Ω transmission lines, 100Ω (2 ×
50Ω) differentially terminated
- logic low
- logic high
- swing (each single-ended output)
- common mode ...... max V
Electrical Operating Characteristics (Continued)
...... typ V
...... min V
(3)
(4)
PLUSD
PLUSD
PLUSD
= 2.5V
= 2.4V
= 2.6V
CLK
or V
CLKB
)
Level
Test
4
4
4
4
4
4
4
4
4
4
4
4
1
1
1
4
1
4
V
P
R
V
Symbol
CLK
V(SDA)
P
CLK, CLKB
CLK, CLKB
OH
V(GA)
P
V
C
R
V
CLK
V
V
V
V
V
V
CLKB
CLK
CLK
CLK
CM
OH
OL
- V
V
IH
IH
IL
IL
CLKB
or
OL
LVDS (V
±100
±200
1250
–0.4
–0.5
–0.5
Min
250
1.7
1.5
–1
–4
45
90
0
0
PLUSD
= 2.5V typical)
±250
±500
1075
1425
1250
Typ
100
400
0.3
50
0
1
4
0
0
EV10AS008B
0811A–BDC–12/08
±354
±708
1250
Max
+3.3
110
450
0.3
1.1
0.8
3.3
0.5
0.5
55
4
7
Unit
dBm
dBm
mV
mV
mV
mV
mV
mV
mV
mV
pF
Ω
Ω
V
V
V
V
V
V
V
7

Related parts for EVX10AS008BGL