FIN24AC Fairchild Semiconductor, FIN24AC Datasheet - Page 20

• Manufacturer Part Number: FIN24AC
• Description: Fin24ac ? ?serdes? 22-bit Bi-directional Serializer/deserializer
• Manufacturer: Fairchild Semiconductor

© 2005 Fairchild Semiconductor Corporation
FIN24AC Rev. 1.0.3
AC Loading and Waveforms
Figure 25. Differential Input Setup and Hold Times
DS+,CKS0+
S1 or S2
DS-,CKS0-
CKSI+
Note: CKREF must be active and PLL must be stable.
Figure 29. Serializer Enable and Disable Time
CKSI-
DSI+
Note: CKREF Signal can be stopped either HIGH or LOW.
Figure 27. PLL Loss of Clock Disable Time
CKREF
DSI-
CKS0
t
PLZ(HZ)
V
DIFF=0
t
V
S_DS
DIFF=0
t
TPPLD0
V
HIGH-Z
ID
/2
(Continued)
t
H_DS
t
PZL(ZH)
20
Figure 30. Deserializer Enable and Disable Times
CKSO+
CKSO-
Note: If S1(2) transitioning, S2(1) must = 0 for test to be valid.
DSO+
DSO-
Figure 26. Differential Output Signal Skew
S1 or S2
S1 or S2
CKS0
Note: Data is typically edge aligned with the clock.
Figure 28. PLL Power-Down Time
DP
t
PLZ(HZ)
V
DIFF
V
DIFF
= 0
= 0
t
TPPLD1
t
SK(P-P)
V
ID
/ 2
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t
PZL(ZH)