ADT7473 Analog Devices, Inc., ADT7473 Datasheet - Page 28

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ADT7473

Manufacturer Part Number
ADT7473
Description
Dbcool Remote Thermal Monitor And Fan Controller
Manufacturer
Analog Devices, Inc.
Datasheet

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ADT7473
The fan inputs have an input resistance of nominally 160 k Ω
ground, which should be taken into account when calculati
resistor values.
With a pull-up voltage of 12 V and pull-up resistor less than
1 kΩ, suitable values for R1 and R2 are 120 kΩ and 47 kΩ,
respectively. This gives a high input voltage of 3.35 V.
Fan Speed Measurement
The fan counter does not count the fan TACH output pulses
directly, because the fan speed could be less th
and it would take several s
large and accurate count. Instead, the period of the fan revolu-
tion is measured by gating an on-chip 90 kHz oscillator into th
input of a 16-bit counter for N periods of the fan TACH o
(see
proportional to the fan tachometer period, and inversely
proportional to the fan speed.
N, the num
of the TACH pulses per revolution register
This register contains two bits for each fan,
(default), three, or four TACH pulses to be
Fan Speed Measurement Registers
The fan tachometer readings are 16-bit values consisting of a
2-byte read from the ADT7473.
CLOCK
Figure 40. Fan with Strong TACH Pull-Up to > V
TACH
PWM
12V
Figure 41), so the accumulated count is actually
ber of pulses counted, is determined by the settings
1
2
3
<1kΩ
4
Figure 41. Fan Speed Measurement
Attenuated with R1/R2
TACH
OUTPUT
econds to accumulate a reasonably
R1*
*SEE TEXT
R2*
TACH
CC
or Totem-Pole Output,
(Register 0x7B).
counted.
allowing one, two
FAN SPEED
ADT7473
an 1,000 RPM
COUNTER
V
CC
utput
ng
Rev. A | Page 28 of 76
to
e
Register 0x28, TACH1 Low Byte = 0x00 de
Register 0x29, TACH1 High Byte = 0x00 default
Register 0x2A, TACH2 Low Byte = 0x00 default
Register 0x2B, TACH2 High Byte = 0x00 default
Register 0x2C, TACH3 Low Byte = 0x00 default
Register 0x2D, TACH3 High Byte = 0x00 default
Regist
Regist
Reading F
The measurem
each measurement. The low byte should be read first. This
causes the high byte to be frozen until both high and low byte
registers have been read, preventing erroneous TACH read
The fan tachometer reading registers report back the number
11.11 μs period clocks (90 kHz oscillator) gated to the fan sp
counter, from the rising edge of the first fan TACH pulse to t
rising edge of the third fan TACH pulse (assuming two pulses
per revolution are being counted). Because the device is
essentially measuring the fan TACH
count value, the slower th
tachometer reading of 0x
stalled or is running very slowly (<100 RPM).
High Limit > Comparison Performed
Because the actual fan TACH period is measured, falling
a fan TACH limit by 1 sets the appropriate status bit and can
used to generate an SMBALERT .
Measuring Fan TACH
When the ADT7473 starts up, TACH measurements are locked.
In effect, an internal read of the low byte has been ma
each TACH input. The net result of th
read
corres
also i
Once
meas
norm
Fan
The
byte
Register 0x54, TACH1 Minimum Low Byte = 0xFF default
Register 0x55, TACH1 Minimum High Byte = 0xFF default
Register 0x56, TACH2 Minimum Low Byte = 0xFF default
s.
ings are locked until the hig
fan TACH limi
TACH Limit
gnored until th
urements are u
al.
the correspondi
er 0x2E, TACH4 Low Byte = 0x00 defa
er 0x2F, TACH4 High Byte = 0x00 defa
ponding TAC
an Speed from the ADT7473
ent of fan speeds involves a 2-register read for
Registers
t registers are 16-bit values consisting of two
H registers. Al
nlocked and interrupts are processed as
e appropriate high byte is read.
ng hig
FFFF indicates either the fan has
e fan is actually running. A 16-bit fan
h byte has been read, TACH
h byte is read from the
l TACH related interrupts are
period, the higher the
is is that all TACH
fault
ult
ult
de for
below
ings.
eed
he
be
of

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