ADT7473 Analog Devices, Inc., ADT7473 Datasheet - Page 23

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ADT7473

Manufacturer Part Number
ADT7473
Description
Dbcool Remote Thermal Monitor And Fan Controller
Manufacturer
Analog Devices, Inc.
Datasheet

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The user can also set up the ADT7473 so that, when the
THERM pin is driven low externally, the fans run at 100%. The
fans run at 100% for the duration of the time the THERM pin is
pulled low. This is done by setting the BOOST bit (Bit 2) in
Configuration Register 3 (0x78) to 1. This works only if the fan
is already running, for example, in manual mode when the
current duty cycle is above 0x00, or in automatic mode when
the temperature is above T
or if the duty cycle in manual mode is set to 0x00, then pullin
the THERM low externally has no effect. See Figure 28 for more
information.
THE
The
asse
conn
measure system performance. The THERM input can also be
conn
The timer is started on the assertion of the ADT7473’s THERM
input and stopped when THERM is deasserted. The timer
counts THERM times cumulatively; that is, the timer resumes
counting on the next THERM assertion. The THERM timer
continues to accumulate THERM assertion times until the
timer is read (it is cleared on read) or until it reaches full scale.
If the counter reaches full scale, it stops at that reading until
clear d.
The 8-bit THERM
that Bit 0 is set to 1 on the first THERM assertion. Once the
cumulative THERM assertion time has exceeded 45.52 ms, Bit 1
of the THERM timer is set and Bit 0 becomes the LSB of the
timer with a resolution of 22.76 ms (see Figure 29).
T
THERM
THER
FAN
TEM
MIN
rtion time. For example, the
S DO NOT GO TO 100% BECAUSE
PERATURE IS BELOW T
ADT7473 has an internal timer to measure
e
RM
ected to the
ected to the output of a trip point temperature se
M ASSERTED TO LOW AS AN INPUT:
TIMER
Figure 28. Asserting THERM Low as an Input
in Automatic Fan Speed Control Mode
PROCH
timer status register (0x79) is designed so
MIN
.
OT
MIN
THERM ASSERTED TO LOW AS AN INP
FANS DO NOT GO TO 100% BECAUSE
TEMPERATURE IS ABOVE T
ARE ALREADY RUNNING.
. If the temperature is below T
output of a Pentium 4 CPU to
THERM input can be
THERM
MIN
AND FANS
nsor.
UT:
MIN
Rev. A | Page 23 of 76
g
Wh n using the THERM timer, be aware of the following.
After a THERM timer read (0x79):
1.
2.
If the THERM timer is read during a THERM assertion, the
the f
1.
2.
3.
4.
Gen
Eve
The
programmable THERM timer limit is exceeded. This allows the
system designer to ignore brief, infrequent THERM assertions,
while capturing longer THERM timer events. Register 0x7A is
the THERM timer limit register. This 8-bit register allows a
limit from 0 sec (first THERM assertion) to 5.825 sec to be set
before an SMBALERT is generated. The THERM timer value is
compared with the contents of the THERM timer limit register.
e
nts
ollowing happens:
ADT7473 can generate a
erating
The contents of the timer are cleared on read.
The F4P bit (Bit 5) of Interrupt Status Register 2 needs to
be cleared (assuming that the
exceeded).
The contents of the timer are cleared.
Bit 0 of the THERM timer is set to 1 (because a THERM
assertion is occurring).
The THERM timer increments from 0.
If the THERM timer limit (Register 0x7A) = 0x00, the F4P
bit is set.
(REG. 0x79)
(REG. 0x79)
(REG. 0x79)
THERM
THERM
THERM
THERM
THERM
THERM
TIMER
TIMER
TIMER
ACCUMULATE THERM LOW
ACCUMULATE THERM LOW
SMBALERT Interrupts from THERM Timer
Figure 29. Understanding the THERM Timer
ASSERTION TIMES
ASSERTION TIMES
0 0 0
7 6 5
0 0 0
7 6 5
0 0 0
7 6 5
0
4
0
4
0
4
0 0 0 1
3 2 1 0
0 0 1 0
3 2 1 0
0 1 0 1
3 2 1 0
n SMBALERT when a
THERM ASSERTED ≥ 113.8ms
THERM timer limit has been
(91.04ms + 22.76ms)
THERM ASSERTED
THERM ASSERTED
≤ 22.76ms
≥ 45.52ms
ADT7473
n

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