ADT7473 Analog Devices, Inc., ADT7473 Datasheet - Page 12

• Manufacturer Part Number: ADT7473
• Description: Dbcool Remote Thermal Monitor And Fan Controller
• Manufacturer: Analog Devices, Inc.

ADT7473
It is possible to read a data byte from a data register withou
firs writing to the address pointer register, if the address
point
possible to write data to a register without writing to the
address pointer register, because the first data byte of a write is
always written to the address pointer register.
In addition to supporting t
protocols, the ADT7473 also supports the read byte protocol.
(See System Management Bus Specifications Rev. 2 for more
information; this document is available from In l.)
If several read or write operations must be performed in succes-
sion, the master can send a
stop condition to begin a new operation.
WRITE OPERATIONS
The SMBus specification defines several
read and write operations. The ADT7473 uses the following
SMBus write protocols. The following abbreviations are use
the diagrams:
S – START
P – STOP
R – READ
W –
A – ACKNOWLEDGE
A – NO ACKNOWLEDGE
Sen
In th
byte to a slave device, as follows:
1.
2.
3.
4.
5.
6.
t
d Byte
WRITE
is operation, the master device sends a single command
The master device asserts a start condition on SDA.
The master sends the 7-bit slave address followed by the
write bit (active low).
The addressed slave device assert
The master sends a command code.
The slave asserts ACK on SDA.
The master asserts a stop condition on SD
transaction ends.
er register is alread
SDA
SCL
SDA
SCL
START BY
MASTER
START BY
MASTER
1
0
1
0
y at the correct value. However, it is not
1
1
he send byte and receive byte
repeat start condition instead of a
SERIAL BUS ADDRESS BYTE
SERIAL BUS ADDRESS BYTE
0
0
1
FRAME 1
1
FRAME 1
s ACK on SDA.
protocols for various
1
1
Figure 16. Reading Data from a Pre
Figure 15. Writing to the Address
A and the
te
1
1
0
0
R/W
R/W
t
d in
Rev. A | Page 12 of 76
ACK. BY
ADT7473
ADT7473
ACK. BY
9
9
D7
D7
1
1
viously Selected Register
For the ADT7473, the send byte protocol is
register address to RAM for a subsequent single-byte read from
the same address. This operation is illustrated in Figure 17.
If the master is required to read data from the register immedi
ately after setting up the address, it can assert a repeat start
condition immediately after the final ACK and carry out a
single-byte read without asserting an intermediate stop
condition.
Write Byte
In this operation, the master device sends a command byte and
one data byte to the slave device, as follows:
1.
2.
3.
4.
5.
6.
7.
8.
The single byte write operation is illustrated in Figure 18.
Pointer Register Only
D6
D6
ADDRESS POINTER REGISTER BYTE
The master device
The master sends the 7-bit slave address followed by the
write bit (active low).
The addressed slave device asserts ACK on SDA.
Th
The slave asserts ACK on SDA.
The master
The slave asserts ACK on SDA.
The master asserts a stop condition on
transaction
D5
D5
e master sends a command code.
Figure 17. Setting a Register Address for Subsequent Read
DATA BYTE FROM ADT7473
1
S
D4
D4
ADDRESS W A
SLAVE
Figure 18. Single-Byte Write to a Register
FRAME 2
S
1
FRAME 2
2
sends a data byte.
en
D3
ADDRESS
D3
SLAVE
ds.
2
D2
D2
asserts a start condition on SDA.
3
W A
REGISTER
ADDRESS
D1
D1
3
4
REGISTER
ADDRESS
D0
D0
NO ACK. BY
4
MASTER
ADT7473
ACK. BY
A
5
9
9
DATA
A P
5 6
6
used to write a
SDA, and the
STOP B
MASTE
STOP BY
MASTER
A P
7 8
R
Y
-