PM8621 PMC-Sierra, Inc., PM8621 Datasheet - Page 84

• Manufacturer Part Number: PM8621
• Description: NSE-8G Standard Product Data Sheet Preliminary
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2010850, Issue 1
Register 021H, 025H: CSTR #1 – 2* Interrupt Enable and CSU Lock Status
This register configures the operation of CSTR block #1.
LOCKE
LOCKV
Bit
Bit 31-2
Bit 1
Bit 0
The CSU lock interrupt enable bit (LOCKE) controls the contribution of CSU lock state
interrupts by the CSTR to the device interrupt INTB. When LOCKE is high, INTB is asserted
low when the CSU lock state changes. Interrupts due to CSU lock state are masked when
LOCKE is set low.
The CSU lock status bit (LOCKV) indicates whether the clock synthesis unit has successfully
locked with the system clock. LOCKV is set low when the CSU has not successfully locked
with the reference clock. LOCKV is set high if when the CSU has locked with the reference
clock.
Type
R
R
R/W
LOCKV
LOCKE
Function
Unused
Default
X
X
0
NSE-8G™ Standard Product Data Sheet
Preliminary
83