PM8621 PMC-Sierra, Inc., PM8621 Datasheet - Page 132

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PM8621

Manufacturer Part Number
PM8621
Description
NSE-8G Standard Product Data Sheet Preliminary
Manufacturer
PMC-Sierra, Inc.
Datasheet
11.2.1
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2010850, Issue 1
Notes
1.
2.
3.
4.
Boundary Scan Cells
In the following diagrams, CLOCK-DR is equal to TCK when the current controller state is
SHIFT-DR or CAPTURE-DR, and unchanging otherwise. The multiplexer in the center of the
diagram selects one of four inputs, depending on the status of select lines G1 and G2. The ID
Code bit is as listed in the Boundary Scan Register, Table 14.
Figure 13 Input Observation Cell (IN_CELL)
Pin/ Enable
Logic one
Logic one
Logic one
Logic one
When set high, INTB will be set to high impedance.
Enable cell OEB_pinname, tristates pin pinname when set high.
OEB_INTB is the first bit of the boundary scan chain.
Cells ‘Logic one’ are Input Observation cells whose input pad is bonded to VDD internally.
I.D. Code bit
CLOCK-DR
SHIFT-DR
IDCODE
Input
Pad
Register Bit
3
2
1
0
Scan Chain In
1 2
1 2
1 2
1 2
G1
G2
MUX
Cell Type
IN_CELL
IN_CELL
IN_CELL
IN_CELL
D
C
Scan Chain Out
NSE-8G™ Standard Product Data Sheet
I.D. Bit
-
-
-
-
to internal
INPUT
logic
Preliminary
131

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