PM8621 PMC-Sierra, Inc., PM8621 Datasheet - Page 89

• Manufacturer Part Number: PM8621
• Description: NSE-8G Standard Product Data Sheet Preliminary
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2010850, Issue 1
Register 047H: DCB Access Mode Register
Writing to this register with the WRB register bit set high initiates an indirect read from the
offline connection memory page. WORDADDR selects the offline connection memory page to
read from. There is a latency of 6 SYSCLK cycles from when this register is written to with the
WRB bit set high until when valid data appears on the Configuration Output register. Indirect
reads should be spaced at least 6 SYSCLK cycles apart to permit valid data to appear in the
Configuration Output register.
Writing to this register with the WRB register bit set low initiates an indirect write to the offline
connection memory page. WORDADDR selects the offline connection memory page to write to.
Indirect writes should be spaced at least 4 SYSCLK cycles apart to ensure the writes complete
successfully.
While page copy is in progress (UPDATEV register bit = ‘1’), writing to this register will NOT
cause data to be updated to/from the offline connection memory page.
While a page swap is pending (SWAPV register bit = ‘1’), writing to this register MAY cause
unpredictable results as data may be transferred while a page swap is occurring, causing data to
be updated to a different connection memory page from the intended.
WRB
ACCMDE
Bit
Bit 31
Bit 30
Bit 29
Bit 28-24
Bit 23-21
Bit 20-16
Bit 15-14
Bit 13-0
The indirect access control bit selects between a write (0) or read (1) access to the offline
connection memory page.
These bits indicate the access mode of the offline connection memory page.
0 : PORT transfer mode.
1 : WORD transfer mode.
Type
R/W
R/W
R
R/W
R
R/W
R
R/W
ACCMDE
PORTCFG[4:0]
PORTADDR[4:0]
WORDADDR [13:0]
Function
WRB
Unused
Unused
Unused
NSE-8G™ Standard Product Data Sheet
Default
1
0
X
0
X
0
X
0
Preliminary
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