PM8621 PMC-Sierra, Inc., PM8621 Datasheet - Page 25
PM8621
Manufacturer Part Number
PM8621
Description
NSE-8G Standard Product Data Sheet Preliminary
Manufacturer
PMC-Sierra, Inc.
Datasheet
1.PM8621.pdf
(184 pages)
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8.1
8
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2010850, Issue 1
Pad Name
LVDS Ports (128 Balls)
RP[1]
RN[1]
RP[2]
RN[2]
RP[3]
RN[3]
RP[4]
RN[4]
RP[5]
RN[5]
RP[6]
RN[6]
RP[7]
RN[7]
RP[8]
RN[8]
RP[9]
RN[9]
RP[10]
RN[10]
RP[11]
RN[11]
RP[12]
RN[12]
Pin Description
Pin Description Table
Type
Analog
LVDS Input
Pin No.
J4
J3
K3
K2
L2
L1
M3
M2
R4
R3
U2
U1
U4
U3
V2
V1
AB4
AB3
AC3
AC2
AD4
AD3
AD2
AD1
Function
Receive Serial Data. The differential receive serial data
links (RP[11:0]/RN[11:0]) carry the receive SBI336S or
SONET/SDH STS-12 frame data from upstream sources
in bit serial format. Each differential pair RP[X]/RN[X]
carries a constituent SBI336 or STS-12 stream. Data on
RP[X]/RN[X] is encoded in an 8B/10B format extended
from IEEE Std. 802.3. The 8B/10B character bit ‘a’ is
transmitted first and the bit ‘j’ is transmitted last. All
RP[X]/RN[X] differential pairs must be frequency locked
and phase aligned (within a certain tolerance) to each
other. RP[11:0]/RN[11:0] are nominally 777.6 Mbit/s data
streams.
Any unused or N/C, but available inputs should be tied
low using a 10 k resistor.
NSE-8G™ Standard Product Data Sheet
Preliminary
24
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