CM68HC05C4ACFB Motorola / Freescale Semiconductor, CM68HC05C4ACFB Datasheet - Page 57

• Manufacturer Part Number: CM68HC05C4ACFB
• Description: Microcontroller
• Manufacturer: Motorola / Freescale Semiconductor

8.5 Input Capture Register
MC68HC05C4A
MOTOROLA
—
Rev. 4.0
Two 8-bit registers, which make up the 16-bit input capture register, are
read-only and are used to latch the value of the free-running counter
after the corresponding input capture edge detector senses a defined
transition. The level transition which triggers the counter transfer is
defined by the corresponding input edge bit (IEDG). Reset does not
affect the contents of the input capture register except when exiting stop
mode.
The result obtained by an input capture will be one more than the value
of the free-running counter on the rising edge of the internal bus clock
preceding the external transition. This delay is required for internal
synchronization. Resolution is one count of the free-running counter,
which is four internal bus clock cycles.
The free-running counter contents are transferred to the input capture
register on each proper signal transition regardless of whether the input
capture flag (ICF) is set or clear. The input capture register always
contains the free-running counter value that corresponds to the most
recent input capture.
After a read of the input capture register ($14) MSB, the counter transfer
is inhibited until the LSB ($15) is also read. This characteristic causes
15
15
OUTPUT COMPARE REGISTER HIGH OUTPUT COMPARE REGISTER LOW
COUNTER HIGH BYTE
Figure 8-2. Output Compare Operation
16-BIT COMPARATOR
8 7
Timer
TIMER CONTROL REGISTER
COUNTER LOW BYTE
$0012
0
0
TIMER STATUS REGISTER
General Release Specification
$0013
Input Capture Register
CONTROL
LOGIC
PIN
INTERRUPT
TCMP
REQUEST
TIMER
Timer
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