CM68HC05C4ACFB Motorola / Freescale Semiconductor, CM68HC05C4ACFB Datasheet - Page 111

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CM68HC05C4ACFB

Manufacturer Part Number
CM68HC05C4ACFB
Description
Microcontroller
Manufacturer
Motorola / Freescale Semiconductor
Datasheet
SWI
TAX
TST opr
TSTA
TSTX
TST opr ,X
TST ,X
TXA
WAIT
12.6 Opcode Map
MC68HC05C4A
MOTOROLA
A
C
CCR Condition code register
dd
dd rr
DIR
ee ff
EXT
ff
H
hh ll
I
ii
IMM
INH
IX
IX1
IX2
M
N
n
Source
Form
Accumulator
Carry/borrow flag
Direct address of operand
Direct address of operand and relative offset of branch instruction
Direct addressing mode
High and low bytes of offset in indexed, 16-bit offset addressing
Extended addressing mode
Offset byte in indexed, 8-bit offset addressing
Half-carry flag
High and low bytes of operand address in extended addressing
Interrupt mask
Immediate operand byte
Immediate addressing mode
Inherent addressing mode
Indexed, no offset addressing mode
Indexed, 8-bit offset addressing mode
Indexed, 16-bit offset addressing mode
Memory location
Negative flag
Any bit
Software Interrupt
Transfer Accumulator to Index Register
Test Memory Byte for Negative or Zero
Transfer Index Register to Accumulator
Stop CPU Clock and Enable Interrupts
Rev. 4.0
Table 12-6. Instruction Set Summary (Continued)
Operation
See
Table
12-7.
Instruction Set
PCH
PCL
SP
SP
PC
SP
SP
SP
Interrupt Vector High Byte
Interrupt Vector Low Byte
Description
(SP) – 1; Push (PCH)
(SP) – 1; Push (CCR)
(PC) + 1; Push (PCL)
(SP) – 1; Push (X)
(SP) – 1; Push (A)
(M) – $00
(SP) – 1; I
X
A
opr
PC
PCH Program counter high byte
PCL Program counter low byte
REL Relative addressing mode
rel
rr
SP
X
Z
#
( )
–( )
?
:
(A)
(X)
Operand (one or two bytes)
Program counter
Relative program counter offset byte
Relative program counter offset byte
Stack pointer
Index register
Zero flag
Immediate value
Logical AND
Logical OR
Logical EXCLUSIVE OR
Contents of
Negation (two’s complement)
Loaded with
If
Concatenated with
Set or cleared
Not affected
1
— 1 — — —
— — — — —
— —
— — — — —
— 0 — — —
H I N Z C
General Release Specification
Effect on
CCR
INH
INH
INH
DIR
INH
INH
INH
IX1
IX
Instruction Set
Opcode Map
8F
3D
4D
5D
6D
7D
83
97
9F
dd
ff
111
10
2
2
4
3
3
5
4
2

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