CM68HC05C4ACFB Motorola / Freescale Semiconductor, CM68HC05C4ACFB Datasheet - Page 50
![no-image](/images/no-image-200.jpg)
CM68HC05C4ACFB
Manufacturer Part Number
CM68HC05C4ACFB
Description
Microcontroller
Manufacturer
Motorola / Freescale Semiconductor
Datasheet
1.CM68HC05C4ACFB.pdf
(156 pages)
- Current page: 50 of 156
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Input/Output (I/O) Ports
7.4 Port B
7.5 Port C
General Release Specification
50
Port B is an 8-bit bidirectional port. The port B data register is at $0001,
and the data direction register (DDR) is at $0005. Reset does not affect
the data registers, but clears the data direction registers, thereby
returning the ports to inputs. Writing a 1 to a DDR bit sets the
corresponding port pin to output mode. Each of the port B pins has a
mask programmable interrupt capability. This interrupt option also
enables a pullup device when the pin is configured as an input (see
Figure
will pertain to the enabled port B pins via mask options. Be careful when
using port B pins that have the pullup enabled. Before switching from an
output to an input, the data should be preconditioned to a 1 to prevent
an interrupt from occurring.
Port C is an 8-bit bidirectional port. The port C data register is at $0002
and the data direction register (DDR) is at $0006. Reset does not affect
the data registers, but clears the data direction registers, thereby
returning the ports to inputs. Writing a 1 to a DDR bit sets the
corresponding port bit to output mode. PC7 has a high current sink and
source capability.
PB0
7-1). The edge or edge and level sensitivity of the IRQ pin also
V
DD
Input/Output (I/O) Ports
NORMAL PORT CIRCUITRY
V
DD
Figure 7-1. Port B Pullup Option
AS SHOWN IN
MASK OPTION
FIGURE 7-2.
FROM ALL OTHER PORT B PINS
DDR BIT
IRQ
MC68HC05C4A
SCHMITT
TRIGGER
TO
INTERRUPT
LOGIC
MOTOROLA
—
Rev. 4.0
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