CM68HC05C4ACFB Motorola / Freescale Semiconductor, CM68HC05C4ACFB Datasheet - Page 51

• Manufacturer Part Number: CM68HC05C4ACFB
• Description: Microcontroller
• Manufacturer: Motorola / Freescale Semiconductor

7.6 Port D
7.7 Input/Output Programming
MC68HC05C4A
MOTOROLA
—
Rev. 4.0
Port D is a 7-bit fixed input port. Four of its pins are shared with the SPI
subsystem, and two more are shared with the SCI subsystem. Reset
does not affect the data registers. During reset, all seven bits become
valid input ports because all special function output drivers associated
with the SCI, timer, and SPI subsystems are disabled.
I/O port pins may be programmed as inputs or outputs under software
control. The direction of the pins is determined by the state of the
corresponding bit in the port data direction register (DDR). Each I/O port
has an associated DDR. Any I/O port pin is configured as an output if its
corresponding DDR bit is set to a logic 1. A pin is configured as an input
if its corresponding DDR bit is cleared to a logic 0.
At power-on or reset, all DDRs are cleared, which configures all I/O pins
as inputs. The data direction registers are capable of being written to or
read by the processor. During the programmed output state, a read of
the data register actually reads the value of the output data latch and not
the I/O pin. For further information, refer to
*R/W is an internal signal.
R/W*
0
0
1
1
Input/Output (I/O) Ports
DDR
0
1
0
1
Table 7-1. I/O Pin Functions
The I/O pin is in input mode. Data is written into the
Data is written into the output data latch and output to
The state of the I/O pin is read.
The I/O pin is in an output mode. The output data latch is
output data latch.
the I/O pin.
read.
I/O Pin Function
Table 7-1
General Release Specification
Input/Output (I/O) Ports
and
Figure
7-2.
Port D
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