11274-001 AMI Semiconductor, Inc., 11274-001 Datasheet - Page 3

• Manufacturer Part Number: 11274-001
• Description: Logic and Timing, Programmable Line Lock Clock Generator IC, Tape and Reel
• Manufacturer: AMI Semiconductor, Inc.

4.1.2
The Feedback Divider is based on a dual-modulus
prescaler technique. The technique allows the same
granularity as a fully programmable feedback divider,
while still allowing the programmable portion to operate at
low speed. A high-speed pre-divider (also called a
prescaler) is placed between the VCO and the program-
mable Feedback Divider because of the high speeds at
which the VCO can operate. The dual-modulus technique
insures reliable operation at any speed that the VCO can
achieve and reduces the overall power consumption of
the divider.
For example, a fixed divide-by-eight could be used in the
Feedback Divider. Unfortunately, a divide-by-eight would
limit the effective modulus of the feedback divider path to
multiples of eight. The limitation would restrict the ability
of the PLL to achieve a desired input-frequency-to-
output-frequency ratio without making both the Reference
and Feedback Divider values comparatively large. Large
divider moduli are generally undesirable due to increased
phase jitter.
Figure 3: Feedback Divider
To understand the operation, refer to Figure 3. The M-
counter (with a modulus of M) is cascaded with the dual-
modulus prescaler. If the prescaler modulus were fixed at
N, the overall modulus of the feedback divider chain
would be M N. However, the A-counter causes the
prescaler modulus to be altered to N+1 for the first A out-
puts of the prescaler. The A-counter then causes the
dual-modulus prescaler to revert to a modulus of N until
the M-counter reaches its terminal state and resets the
entire divider. The overall modulus can be expressed as
where M
f
vco
Feedback Divider
A, which simplifies to
A
Prescaler
Modulus
Counter
(
Dual-
N
A
M
) 1
N
N
(
M
A
.
A
Counter
)
,
M
3
4.1.3
The requirement that M A means that the Feedback Di-
vider can only be programmed for certain values below a
divider modulus of 56. The selection of divider values is
listed in Table 2.
If the desired Feedback Divider is less than 56, find the
divider value in the table. Follow the column up to find the
A-counter program value. Follow the row to the left to find
the M-counter value.
Above a modulus of 56, the Feedback Divider can be
programmed to any value up to 16383. See both Table 3
and Table 8 for additional programming information.
Table 2: Feedback Modulus Below 56
4.1.4
The Post Divider consists of three individually program-
mable dividers, as shown in Figure 4.
Figure 4: Post Divider
The moduli of the individual dividers are denoted as N
N
modulus N
Programmable Line Lock Clock Generator IC
Programmable Line Lock Clock Generator IC
M-COUNTER:
Programmable Line Lock Clock Generator IC
Programmable Line Lock Clock Generator IC
FBKDIV[13:3]
00000000001
00000000010
00000000011
00000000100
00000000101
00000000110
00000000111
P2
f
, and N
GBL
Feedback Divider Programming
Post Divider
Px
P3
.
POST1[1:0]
Divider 1
(N
, and together they make up the array
Post
000
16
24
32
40
48
56
8
P1
)
N
Px
001
17
25
33
41
49
57
9
POST DIVIDER (N
FEEDBACK DIVIDER MODULUS
N
POST2[1:0]
Divider 2
A-COUNTER: FBKDIV[2:0]
010
P
(N
Post
18
26
34
42
50
58
1
-
P2
)
N
FS6131-01
FS6131-01
011
FS6131-01
FS6131-01
P
27
35
43
51
59
-
-
2
Px
)
N
POST3[1:0]
Divider 3
100
36
44
52
60
P
(N
-
-
-
Post
3
P3
)
101
45
53
61
-
-
-
-
110
54
62
-
-
-
-
-
f
out
111
P1
63
-
-
-
-
-
-
,