11274-001 AMI Semiconductor, Inc., 11274-001 Datasheet - Page 12

• Manufacturer Part Number: 11274-001
• Description: Logic and Timing, Programmable Line Lock Clock Generator IC, Tape and Reel
• Manufacturer: AMI Semiconductor, Inc.

FS6131-01
FS6131-01
FS6131-01
FS6131-01
Programmable Line Lock Clock Generator IC
Programmable Line Lock Clock Generator IC
Programmable Line Lock Clock Generator IC
Programmable Line Lock Clock Generator IC
6.0
All register bits are cleared to zero on power-up. All register bits may be read back as written except STAT[1] (Bit 63).
Table 3: Register Map
ADDRESS
BYTE 7
BYTE 6
BYTE 5
BYTE 4
BYTE 3
BYTE 2
BYTE 1
BYTE 0
Programming Information
FBKDSRC[1]
Reserved (0)
0 = Crystal Loop
1 = Crystal Loop
OUTMUX[1]
Powered Down
FBKDIV[7]
REFDIV[7]
0 = Feedback
XLPDEN
1 = FBK Pin
STAT[1]
01 = Crystal Loop – Out of Range
PDFBK
Operates
00 = Crystal Loop – Lock Status
10 = Main Loop – Phase Status
BIT 7
(Bit 63)
(Bit 55)
(Bit 47)
(Bit 39)
(Bit 31)
(Bit 15)
01 = Reference Divider Output
Divider
11 = Feedback Divider Output
(Bit 7)
128
128
10 = Phase Detector Input
00 = Post Divider Output
10 = Post Divider Input
11 = VCXO Output
00 = VCO Output
01 = FBK Pin
11 = FBK Pin
FBKDSRC[0]
Reserved (0)
OUTMUX[0]
External VCXO
Internal VCXO
REFDIV[6]
FBKDIV[6]
0 = Reference
XLSWAP
0 = Use with
1 = Use with
1 = REF Pin
STAT[0]
PDREF
BIT 6
(Bit 62)
(Bit 54)
(Bit 46)
(Bit 38)
(Bit 30)
(Bit 14)
Divider
(Bit 6)
64
64
FBKDIV[13]
Powered Down
0 = Low Phase
Jitter Oscillator
OSCTYPE
0 = Main Loop
1 = Main Loop
REFDIV[5]
0 = Fine Tune
1 = Fine Tune
FBKDIV[5]
POST3[1]
XLVTEN
1 = FS6031
XLCP[1]
M Counter
Oscillator
Operates
SHUT
BIT 5
Inactive
(Bit 61)
(Bit 53)
(Bit 45)
(Bit 37)
(Bit 29)
(Bit 21)
(Bit 13)
Active
(Bit 5)
8192
32
32
00 = Divide by 1
01 = Divide by 3
10 = Divide by 5
11 = Divide by 4
00 = 1.5 A
11 = 24 A
01 = 5 A
10 = 8 A
1 = CMOS, Lock
FBKDIV[12]
0 = High Speed
1 = Low Speed
REFDSRC
REFDIV[4]
FBKDIV[4]
POST3[1]
VCOSPD
XLCP[0]
1 = Ref Pin
0 = VCXO
0 = PECL
CMOS
BIT 4
(Bit 60)
(Bit 52)
(Bit 44)
(Bit 36)
(Bit 28)
(Bit 20)
(Bit 12)
Range
Range
Status
(Bit 4)
4096
16
16
12
REFDIV[11]
FBKDIV[11]
0 = Short Time
1 = Long Time
FBKDIV[3]
REFDIV[3]
XLROM[2]
POST2[1]
XCT[3]
Constant
Constant
BIT 3
(Bit 59)
(Bit 51)
LFTC
(Bit 43)
(Bit 35)
(Bit 27)
(Bit 19)
(Bit 11)
(Bit 3)
2048
2048
8
8
00 = Divide by 1
01 = Divide by 3
10 = Divide by 5
11 = Divide by 4
M Counter
Crystal Loop Control
1 = External Loop
0 = Internal Loop
FBKDIV[10]
REFDIV[10]
See Table 10
FBKDIV[2]
REFDIV[2]
XLROM[1]
POST2[0]
XCT[2]
EXTLF
BIT 2
(Bit 58)
(Bit 50)
(Bit 42)
(Bit 34)
(Bit 26)
(Bit 18)
(Bit 10)
(Bit 2)
Filter
Filter
1024
1024
4
4
VCXO Coarse Tune
See Table 11
A Counter – See Table 2
FBKDIV[9]
FBKDIV[1]
REFDIV[9]
REFDIV[1]
XLROM[0]
POST1[1]
MLCP[1]
XCT[1]
BIT 1
(Bit 57)
(Bit 49)
(Bit 41)
(Bit 33)
(Bit 25)
(Bit 17)
(Bit 9)
(Bit 1)
512
512
2
2
00 = Divide by 1
01 = Divide by 2
10 = Divide by 4
11 = Divide by 8
00 = 1.5 A
11 = 24 A
01 = 5 A
10 = 8 A
1 = Clock Phase
FBKDIV[8]
FBKDIV[0]
REFDIV[8]
REFDIV[0]
0 = No Clock
Phase Adjust
POST1[0]
MLCP[0]
XCT[0]
BIT 0
(Bit 56)
(Bit 48)
(Bit 40)
(Bit 32)
(Bit 24)
(Bit 16)
GBL
(Bit 8)
(Bit 0)
Delay
256
256
1
1