FAN4860 Fairchild Semiconductor, FAN4860 Datasheet - Page 14

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FAN4860

Manufacturer Part Number
FAN4860
Description
The FAN4860 is a low-power boost regulator designed to provide a regulated 5V output from a single cell Li-Ion battery
Manufacturer
Fairchild Semiconductor
Datasheet

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© 2010 Fairchild Semiconductor Corporation
FAN4860 • Rev. 1.1.0
regulation and continually attempt soft-start, only to have
C
The circuit can start with higher values of C
load if V
Generally, the limitation occurs in BST mode.
The FAN4860 starts on the first pass (without triggering a
FAULT) under the following conditions for C
Table 4.
C
V
larger C
Transient Protection
To protect against external voltage transients caused by
ESD discharge events, or improper external connections,
some applications employ an external transient voltage
suppressor (TVS) and Schottky diode (D1 in Figure 41).
The TVS is designed to clamp the FB line (system V
+10V or –2V during external transient events. The Schottky
diode protects the output devices from the positive
excursion. The FB pin can tolerate up to 14V of positive
excursion, while both the FB and VOUT pins can tolerate
negative voltages.
The FAN4860 includes a circuit to detect a missing or
defective D1 by comparing V
0.7V, the IC shuts down. The IC remains shut down until
V
I
OUT
IN
OUT
OUT
EFF
. The presence of higher V
V
> 2.3
> 2.7
> 2.7
IN
< UVLO and V
discharged by the load when in the FAULT state.
values shown in Table 4 typically apply to the lowest
=
(V)
Operating Conditions
EFF
IN
I
Figure 41.
LIM
is higher, since:
at full load.
(
Maximum C
PK
)
I
5.0 V
RIPPLE
IN
25Ω
25Ω
33Ω
2
FAN4860 with External Transient
< UVLO+0.7 or EN is toggled.
OUT
R
• ⎟
LOAD(MIN)
EFF
V
OUT
Protection
V
for First-Pass Startup
OUT
IN
IN
3.3 V
enhances ability to start into
to FB. If V
16Ω
16Ω
20Ω
OUT
OUT
EFF(MAX)
C
EFF(MAX)
OUT
– FB > about
:
10
15
22
under full
OUT
(μF)
) to
(
6)
14
C
when the Schottky is used. When a load is applied at the FB
pin, the forward voltage of the D1 rapidly increases before
the regulator can respond or the inductor current can
change. This causes an immediate drop of up to 300mV,
depending on D1’s characteristics if C
supplies instantaneous current to the load while the regulator
adjusts the inductor current. A value of at least half of the
minimum value of C
needs to withstand the maximum voltage at the FB pin as
the TVS is clamping.
The maximum DC output current available is reduced with
this circuit, due to the additional dissipation of D1.
Layout Guideline
OUT2
Figure 42.
may be necessary to preserve load transient response
Figure 43.
WLCSP Suggested Layout (Top View)
UMLP Suggested Layout (Top View)
OUT
should be used for C
OUT2
www.fairchildsemi.com
is absent. C
OUT2
. C
OUT2
OUT2

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